log☇︎
800+ entries in 0.659s
asciilifeform: fromloper: problem is, there ain't a usable fpga
fromloper: There are open source FPGA 68ks that are pretty small. You might be able to fit 16 on a relatively small one.
fromloper: I don't think the current version does anymore. All the FPGA images are XDP3 or XDP4. I know older versions of System Debugger had support for older XDPs. If you have a student email you can get System Studio for free and it has access to older versions which might support it.
fromloper: FPGA05: Programming FPGA completed
fromloper: MSG016: Verifying FPGA
fromloper: Can anyone help me with sage_pill.py? When I run it, it gets though programming the FPGA, but then dies with: FPGA05: Programming FPGA completed SmartLoadergramming SmartLoader MSG009: Disabling SupportLibrary Traceback (most recent call last): File "./sage_pill.py", line 315, in <module> dump_forever() File "./sage_pill.py", line 251, in dump_forever l = sage.readline() File "/usr/lib/python2.7/dist-packages/seri
asciilifeform: lulzily enough, asciilifeform ~has the box~ -- but 0 software for it, it never leaked. box turned out to contain empty fpga.
asciilifeform: a good chunk of the pain in this kind of work is the ~total lack of anything like the customary debugger. ( that, and the constraints of the medium - the very palpable differences between fpga and actual asic, but even in the latter there are physical delays )
phf: pre-symbolics the "theorems" were "how do i computer" in general. those guys weren't playing around with custom fpga in their garage that they failed to sell. they were basically figuring out how to build a von neumann machine that can do things, which they did
mircea_popescu: can you name the fpga i can both buy and audit ?
BenBE: Any other FPGA should basically do: Original design was a CPLD. So you'd grab one FPGA you /can/ audit the toolchain for and compile the design for that FPGA. It's not too much code.
mircea_popescu: BenBE who makes the fpga / toolchain ?
BenBE: In the FPGA versions they are built of unclocked rings of logic gates (transistors). With the FPGA I use they oscillate at about 150-200MHz (if I read the information of the synth tool correct)
BenBE: mircea_popescu: http://hackaday.com/2010/02/06/hardware-based-randomness-for-linux/ - unfortunately link to original page is down. Also using a FPGA port (done by a friend, verified against dieharder as a starting point).
asciilifeform: take my old example, 'boobytrap an fpga.' elementarily you WILL need to somehow fit an ai in there, to create any serious problem for UNKNOWN bitstream
asciilifeform: phf: the need to 'trust the foundry' evaporates under the 'SOLELY fpga fabric' model of computation. we had the thread.
asciilifeform: mircea_popescu: the 'comp has no business being anything other than large fpga' and 'swamp of nic drivers that have 0 legit reason to exist' are elementarily plagiarized from us
a111: Logged on 2017-04-01 18:31 CompanionCube doesn't think the FPGA article plagiarises #trilema logz but I should most likely read/searc more to be confident about that
CompanionCube doesn't think the FPGA article plagiarises #trilema logz but I should most likely read/searc more to be confident about that ☟︎
asciilifeform: a documented ~homogeneous~ fpga, would suffice.
phf: xorg in fpga..
asciilifeform: then, eventually, whole shebang with fpga.
asciilifeform: then replace card with fpga+ivorychip (after reversed glue logic)
phf: he's welcome, in his own words, to "go, implement". having read that code, i'm unconvinced that it's the "buddha's front gate" to a working lispm fpga
asciilifeform: and, quite verily, they WILL be worth roughly their worth in gold reclamation, if fpga appears.
phf: i think the implication is that "whisperers" are so poor (being dirty redditors) they can't even buy a cheap fpga
asciilifeform: the entire machine would handily fit in my ~smallest~ fpga board.
mircea_popescu: fpga still cost moneyz yes
asciilifeform: also it boggles my mind, why is phf still buying the old iron, the instruction set's been out since '09... buy fpga board.
asciilifeform: and tells something about why to this day we don't have an fpga bolix.
asciilifeform: ( my fpga boards, the nicer ones, DO in fact !! )
asciilifeform: phf: https://github.com/hanshuebner/vlm/blob/master/c-emulator/emulator.c looks like enough to build that fpga ivory...
asciilifeform: though i wonder if optical microscope will be worth a damn in this case : iirc smbx cpu was 'gate array', an early form of fpga based on mask rom
asciilifeform: fpga farm also.
asciilifeform: Old Hax behave like fpga docs etc.
mircea_popescu: http://btcbase.org/log/2017-01-19#1605218 << actually non-interrupt / non-dma (and possibly tagged ram) is about the reason to make own fpga cpu ☝︎
asciilifeform: interestingly the thing mentions 'open toolchain fpga' dozens of times but NOT ONCE says WHICH
asciilifeform: https://www.crowdsupply.com/raptor-computing-systems/talos-secure-workstation/updates/talos-fpga-functions-and-responsibilities-part-1 << the sheer lunacy of the epicycles, omfg!111!
asciilifeform: so anybody claiming to 'make OPEN!11!!!! workstation!' who is not planning to make 1M+gate fpga by the megatonne, is a) subverted b) stupid or c) both.
asciilifeform: at the risk of creating 'wall of text', i'ma spell out for the l0gz readerz: if you sell properly open cpu, folx then have a cpu. if you sell properly open fpga, they then have cpu, ram controller, video card, nic, etc, etc.
asciilifeform: ftr the notion of making anything other than a large-as-possible fpga, for 'owner-controlled computing', is purest poppycock.
asciilifeform: 'The world's first ATX-compatible, workstation-class mainboard for the new, free-software friendly IBM POWER8 processor. Includes one heatsink and 92 mm fan, one ATX-compatible I/O shield, and a live rescue DVD with factory reset utilities, source code for firmware and FPGA components, mainboard schematics, user manual, and Ubuntu installation media. CPU, RAM, power supply, storage drives, and chassis sold separately.'
asciilifeform: i cannot speak for the folx mentioned above, but for me the appeal of, e.g., 6502, or of (pure 'sea of gates', a la FUCKGOATS) fpga work, is that there is 0 shit-in-the-dough
asciilifeform: when you read it as 'slow fpga' it seems imho less appealing.
asciilifeform: ben_vulpes: moore's greenarray is really closer to fpga (but with hypertrophied LUTs!) than to a cpu
asciilifeform: http://btcbase.org/log/2017-01-06#1597384 << i used a similar device to connect fpga card to thinkpad, coupla years ago ☝︎
asciilifeform has an ancient one with buncha fpga crud
mircea_popescu: that fits in a fpga ?!
asciilifeform: meanwhile, so i get a crate with the infamous 'lattice ice' fpga. and go and set up the OPEN SORES!!!11111!!!! toolchain. and lo and behold, it not only bristles with CODE OF CUNTDOCT!!111 etc., but... won't even build
asciilifeform: (your fpga or whatever.)
asciilifeform: (pixel is connected directly to pipe, that can go wherever, fpga-style.)
asciilifeform: similarly to how 'asic' vendors will happily ship 2014 fpga with the etching sanded off.
adlai: Real Software Needs FPGA(tm)(S)(r)
asciilifeform: mepian: what i want to make is a ZERO-closed-vendor-turd machine, among other things. and no existing fpga gives you this.
asciilifeform: and on at least six other occasions. somebody regularly shows up and asks re fpga.
a111: Logged on 2014-12-11 01:52 asciilifeform: decimation: notice that all known fpga manufacturers (xilinx, altera, lattice, a few others) have the same business model
a111: Logged on 2015-06-17 13:17 asciilifeform: you can pick up a textbook and write a dram controller for fpga from first principles - and it won't work. because, for starters, only a small number of output cells in the chip can function on both rising and falling edge of clock cycle (what 'ddr' means) and only xilinx's closed turd knows where they are in the routing fabric;
a111: Logged on 2016-10-03 13:19 mepian: after reading about the plight of asciilifeform trying to implement a driver for gigabit NIC http://btcbase.org/log/2016-09-17#1544183 I wonder if rolling your own NIC on FPGA in this fashion https://www.diva-portal.org/smash/get/diva2:19005/FULLTEXT01.pdf would be less insane
mepian: after reading about the plight of asciilifeform trying to implement a driver for gigabit NIC http://btcbase.org/log/2016-09-17#1544183 I wonder if rolling your own NIC on FPGA in this fashion https://www.diva-portal.org/smash/get/diva2:19005/FULLTEXT01.pdf would be less insane ☝︎☟︎
BingoBoingo: Nah, eventually he's going to Chinese FPGA his own lisp machine
asciilifeform: (if you can source the parts, they are all end-of-life, including the weird fpga)
phf: a friend of mine bought a house in san francisco last year, because he's working on "mysql chip", really an fpga that does a bunch of mysql specific optimizations. (mostly query compilation)
asciilifeform: all roads lead to sane fpga, or to perdition.
asciilifeform: the other bit is, just as in the fpga thread, by the time anyone ~does~ spend the man-years, the requisite hardware is unavailable. see, e.g., 'movitz'.
asciilifeform: mircea_popescu: this is gonna be the fpga thread all over again, isnnit. fact is, the 10,001 man-years are not available, and certainly not six times every morning before breakfast.
asciilifeform: (per my estimate of the transistor count, i'd say that a 100% cycle-for-cycle clone could handily sit down in a $100 fpga and leave plenty of room for, e.g., modern colour vga, etc.)
mod6: i apparently need to read your blog more, at least, on the specifics of lisp-cpu via verilog & fpga
mircea_popescu: yes, but a z80 clone chip is no sort of fpga forcrying out loud.
mircea_popescu: if someone made a fpga-based clone of the symbolics machine that'd prolly get a bunch of people to wet their pants.
a111: Logged on 2016-04-22 01:47 asciilifeform: i actually spent the first ~6 mo. after i bought the lisp machine, trying to rig up, with fpga, a mechanism to read the fucking disk
mod6: so yesterdays discussion got me thinking about a lisp machine (lisp-cpu) with verilog on a fpga
asciilifeform: http://www.clifford.at/icestorm << yet another fpga reversing effort.
asciilifeform: mircea_popescu: to briefly revisit thread, one interesting tidbit you might not know about 'hardcopy fpga' is that it stands on same toolchain as the respective vendor's 'ordinary' fpga (on which one prototypes for the 'hard' variant.)
mircea_popescu: anyway. the big thing with this faux fpga thing is that it's very cheap. the much more important smaller thing is that it makes it god damned easy to steal usian ip.
asciilifeform: recall, i ~like~ fpga, and if it were my will, it would be the only logic chip produced, and anyone who 'needs' ddr3 clock can get phucked
asciilifeform: the real 'killer app' of fpga is 'specificity of diddling'
asciilifeform: fpga is quite like the semiconductor equiv. of '3d printer'.
asciilifeform: other point was that it is quite rare to see fpga deployed in mass produced product, because it has inescapably large per-unit cost compared to classical asic. it makes economic sense for small runs (<100,000) and for items which actually need the reconfigurability.
asciilifeform: anyway metal fpga is great, i'll take ten right now if it's a dime.
mircea_popescu: which is the problem with your clue - it is an anticlue, fed by delusional notions of design purism with no practical exposure whatsoever. in meta-world "nobody buys" metallization fpga for miner asic. in real world, it makes a billion dollars in sales over 5 years, ie, more than ~any "proper" chip class.
asciilifeform: re fpga, largest buyer (not a mega-seekrit) is usg.
asciilifeform: re fpga.
asciilifeform: or even so much as bought 1 unit of fpga, and designed whatever, helloworld.
asciilifeform: chinese have 0 incentive to sell fpga.
asciilifeform: ever see manual for, e.g., xilinx fpga? it is simply a mass of these turds.
asciilifeform: because it is in fact fpga.
asciilifeform: thing is, you get the clock rate of fpga. and same energy consumption. (~same propagation delays).
mircea_popescu: asciilifeform in principle if you make "generic" silicone you can then "fpga" it out of metal mask cuts
a111: 6 results for "hardcopy fpga", http://btcbase.org/log-search?q=hardcopy%20fpga
asciilifeform: $s hardcopy fpga
asciilifeform: trinque: i wrote an fpga thing, long ago.
asciilifeform: this is one of the reasons i wrote 'must have fpga, with quartz window'. you can inspect a ~regular~ geometric structure far more easily than any other kind
asciilifeform: there IS NOT AN FPGA
mircea_popescu: fpga your own tho.
a111: Logged on 2016-07-15 19:09 asciilifeform: pete_dushenski: recall that usg sits on top of egyptian pyramid - sized heap of fpga. why not, then, hijack an old, familiar scrypt-based altcoin, and proclaim 'see, YES WE CAN!111' etc
asciilifeform: pete_dushenski: the usg that promulgates diddled ciphers which are then breakable with array of fpga, and the usg that puts my mail into the box across the street, are not same entity.
pete_dushenski: asciilifeform: mp didn't make egyptian fpga claim!!1
asciilifeform: pete_dushenski: recall that usg sits on top of egyptian pyramid - sized heap of fpga. why not, then, hijack an old, familiar scrypt-based altcoin, and proclaim 'see, YES WE CAN!111' etc ☟︎
asciilifeform suspects that 99% of it is used with fpga
asciilifeform: mircea_popescu: very easy to change if they bought up all the old fpga farms.