log☇︎
1089 entries in 0.826s
asciilifeform: which makes the entire proposition of fpga a thinly-veiled scam
asciilifeform: decimation: what joy. more proprietary crud that has to be on the die for fpga to talk to anything external.
decimation: the latest hotness in fpga is to use a serial bus, after folks have lived in the ddr hell
asciilifeform: mircea_popescu: remember the self-evolving fpga?
mircea_popescu: i am confident asciilifeform can make his own fpga
asciilifeform: all i really need in terms of hardware - is an fpga which isn't a turd.
decimation: in your room-sized FPGA, there is probably a spot for a few 'risc' finite automata
asciilifeform refrains from launching into rant re: how you can actually fit 10x more gates in fpga if you start 'cheating' by using secret data re: the internal layout, and how any system which offers this capability is actually telling lies when advertised with its highest-level intended abstractions as the correct ones.
mircea_popescu: that was a fpga neh ?
asciilifeform: 'aha, block xxxxx, this is when i tried mining on fpga'
asciilifeform: decimation: yes. incidentally this is why we can't really do asynchronous logic (e.g. muller's gate) on extant fpga.
assbot: 1 results for 'fpga evolve' : http://search.bitcoin-assets.com/?q=fpga+evolve
ascii_on_tour: !s fpga evolve
kakobrekla: 20:21:35: <ehird> I hope asciilifeform open sources his FPGA flash disk card < heh, somewhere on irc, in 2009.
asciilifeform: the kind of machine that absolutely requires an fpga - simply has not been designed yet.
asciilifeform: decimation: have to understand what fpga is used for
decimation: it's not like there's a mystery about how to design an fpga
asciilifeform: shame fpga was invented too late for soviet version
asciilifeform: decimation: problem is lack of fpga with documented layout, so you aren't chained to a vendor's turdware.
assbot: debit- xilinx bitstream decompiler project has been vanished? or does someone know the URL | Comp.Arch.FPGA | FPGARelated.com
asciilifeform: http://www.fpgarelated.com/comp.arch.fpga/thread/62565/debit-xilinx-bitstream-decompiler-project-has-been-vanished-or-does-someone-know-the-url.php << censored now and again
assbot: debit - reverse-engineering tools for FPGA bitstreams - Google Project Hosting
asciilifeform: thing you must appreciate, if never having worked with fpga, is that they just barely work.
decimation: yeah ask any fpga design who have attempted to write 'ddr' interface if you want to hear sadness & tears
asciilifeform: because fpga in the schoolbook sense is not actually available.
asciilifeform: basically, fpga works, but all existing high-density examples are sold by scammers of a kind - who absolutely could not abide the buyer using these items as the schoolbook promised - 'reconfigurable computer'
asciilifeform: the serious fpga market (vs. 'lattice' & friends, who largely get used for minor glue logic) is a duopoly.
asciilifeform: (x86 is rather too complex to actually implement in any extant fpga and still leave room for something useful on top)
asciilifeform: because 'xilinx' sells, by the tonne, a large fpga with built in 'ppc' cores.
asciilifeform: not all that similar. cpu in fpga fabric. you can do this right now
assbot: Logged on 13-08-2014 23:40:47; decimation: http://research.microsoft.com/pubs/212001/Catapult_ISCA_2014.pdf << microserf implemented fpga co-processors for bing search, paper is mildly interesting
decimation: yeah I've heard of the 'hybrid fpga cpu' design
decimation: I wish I could just connect a pipe from the sse register to my own fpga machine
asciilifeform: no need to solder, surplus fpga demo board off 'ebay'.
asciilifeform: bounce: if you want this (as i do) built it by hand, with fpga-to-pcie board.
assbot: Starting a new FPGA mining farm/contract! Cognitive Resurrected on[Havelock]
Diablo-D3: Luke-Jr: except ck added fpga and asic support himself
Luke-Jr: BFGMiner = cgminer-the-GPU-miner + FPGA and ASIC support
decimation: "Key to the NSA's approval is the ability of the Spartan-6Q device to isolate user functionality within a single device while maintaining tamper proofing. The NSA completed a fail-safe analysis effort on the Spartan-6Q family to confirm that the individual regions of the FPGA are isolated from each other in the event of failure. "
assbot: NSA Approved Defense-Grade Spartan-6Q FPGA in Production for Highest Level Cryptographic Capabilities Strengthens Xilinx Secure Leadership - Aug 31, 2011
decimation: http://press.xilinx.com/2011-08-31-NSA-Approved-Defense-Grade-Spartan-6Q-FPGA-in-Production-for-Highest-Level-Cryptographic-Capabilities-Strengthens-Xilinx-Secure-Leadership
asciilifeform: to make long story short, there are exactly two vendors of 'high-density' fpga, and their products are almost exactly alike - more so even than 'coca cola' and 'pepsi.'
asciilifeform: it is virtually impossible now to buy a pure fpga.
asciilifeform: what can one accomplish on fpga, knowing nothing about your opponent's future purpose for it, with a small turd ?
asciilifeform: an unexpected cpu in the middle of fpga LUT fabric would stand out even under optical microscope.
asciilifeform: if satan is merely listening to your i/o, this is a listening device in the ordinary sense, and not really fpga-specific diddling
decimation: satan's fpga could have a bugged embedded cpu
asciilifeform: let's say you purchase an fpga from satan.
asciilifeform: fpga is still interesting
asciilifeform: bounce: nope. most fpga work is carried out in units considerably larger than 'gate', from considerations of efficiency.
decimation: bounce: ultimately you are still trusting the fpga maker
asciilifeform: bounce: all the extant fpga have tightly closed architecture
bounce: tangentially, shouldn't it be feasible to get decent performance out of a suitably open-and-accessible-microcode cpu running on some fpga or other these days?
BingoBoingo: Fucking Rasberry Pi is a thing, and consumer MIPS boards are a mirage that require bending FPGA's to shape.
asciilifeform: fpga mining board (as late as 2013) advertised by 'cardreaderfactory', a firm which appears to sell 'card skimmers' (a type of cheating device, popular in usa, where credit card magstripes are secretly read from unsuspecting victim)
asciilifeform: "brainfuck" machine on fpga >> nope. (why not? >> http://www.loper-os.org/?p=55)
decimation: BingoBoingo: write your own "brainfuck" machine on fpga if you want minimal
assbot: Intel unveils new Xeon chip with integrated FPGA, touts 20x performance boost | ExtremeTech
RagnarDanneskjol: this was interesting to hear too http://www.extremetech.com/extreme/184828-intel-unveils-new-xeon-chip-with-integrated-fpga-touts-20x-performance-boost
decimation: http://research.microsoft.com/pubs/212001/Catapult_ISCA_2014.pdf << microserf implemented fpga co-processors for bing search, paper is mildly interesting ☟︎
mircea_popescu: <decimation> absolute confidence is impossible until asciilifeform gets his room-sized fpga << but then where would he sleep ?
decimation: absolute confidence is impossible until asciilifeform gets his room-sized fpga
kakobrekla: wait until they figure out you can do it on fpga.
asciilifeform: likely contents of sd: fpga bitstreams
asciilifeform: no one seriously cares what was in the fpga miners from 2 yrs. ago
asciilifeform: both of the major (well, only ones worth mentioning) fpga vendors make most of their profit from renting out license to use their libraries (ethernet controller, soft cpu cores, etc.) and not from hardware. hence the tightly closed architectures.
decimation: aside from the journalist, there is an implict admission from intel here ... "We have no idea how to organize the transistors on our chip, here - have an FPGA"
decimation: I'm pretty sure altera makes an fpga with an arm core
asciilifeform: (actually there may be. fpga/cpu combo is a dime a dozen - xilinx made ppc/fpga cores for ages. but a modern pc arch cpu is something rather else)
decimation: no, but somehow according to the journalist companies like google would prefer to buy this intel fpga/cpu rather than an arm chip
asciilifeform: afaik there is no mass-market arm/fpga combo ic
asciilifeform: but at least these were traditional fpga and one could (at least in the case of xilinx) use linux toolchain, traditional vhdl/verilog, etc
asciilifeform: decimation: for some years, there were fpga on the market that fit into an intel or amd cpu socket
assbot: Intel reveals its FrankenChip ARM killer: one FPGA and one Xeon IN ONE SOCKET The Register
decimation: re: moore's law http://www.theregister.co.uk/2014/06/18/intel_fpga_custom_chip/
asciilifeform: decimation: these are a dime a dozen. not very useful for fpga work, as the latter have proprietary pieces that, if you do not use, leave you with a monstrously bloated design that fits nowhere.
mircea_popescu: "Speaking as an insider, I can tell you that most HFT firms playing around with FPGAs are doing so because of slick-talking FPGA marketing hucksters. The more that perverse incentives change, the more they stay the same" << flanagan has a point.
BingoBoingo: asciilifeform: I remember that last time you dropped that link and the doubters in the thread, but now... If even Microsoft can pull off FPGA acceleration...
fluffypony: they bolt an FPGA inside a server to offload specific tasks to it
assbot: Starting a new FPGA mining farm/contract! Cognitive Resurrected on[Havelock]
decimation: I'm surprised HP isn't trying to build an fpga with precisely this
asciilifeform: and build the actual state in fpga out of same.
asciilifeform: decimation: think 'emulation of room-sized fpga' and you're 90 percent there.
fluffypony: shit like X11 and X13 may use less power on an FPGA
benkay: !up Swadq what we need is a coin tuned for fpga and cpu architectures
CheckDavid: But I am involved with an FPGA project
CheckDavid: kakobrekla: how is that fpga project going?
assbot: Starting a new FPGA mining farm/contract! Cognitive Resurrected on[Havelock]
asciilifeform: if it was one of the (rare) fpga clusters, it might've been interesting.
asciilifeform: i did get a number of people playing with fpga (the closest thing to 'freedom' in this context, that i know of) who perhaps wouldn't have otherwise.
asciilifeform: jurov: my half-baked fpga prototype cost me about 500 usd. but picture, in my shoes, proposing that it be manufactured en masse, to an industrial magnate.
asciilifeform: decimation: the most basic 'jungle fpga' is just your ordinary ROM.
assbot: Build your own FPGA - Nick's Blog
decimation: Also I found this amusing link: http://blog.notdot.net/2012/10/Build-your-own-FPGA
BingoBoingo: SKipping production FPGA's and going to a foundry after testin VHDL, if miners can do it on the cheap...
asciilifeform: re: monero et al: https://en.bitcoin.it/wiki/CryptoNight - 'A megabyte of internal memory is almost unacceptable for the modern ASICs.' << got fpga with 1MB+ block sram right here in a crate.
assbot: Bliss Devices - FPGA Demo of Scrypt ASIC Design (Official) - YouTube
BohemianHacks: besides I would rather have fpga's to play with at my house
mircea_popescu: they're the ultimate genetically evolved FPGA
ozbot: Starting a new FPGA mining farm/contract Cognitive Resurrected on[Havelock]