log
67 entries in 0.44s
a111: Logged on 2019-01-20 19:59 asciilifeform: a fast rsatron is important mainly in light of fast rejection of crapola sent by enemy, rather than for payload per se.
asciilifeform: a fast rsatron is important mainly in light of fast rejection of crapola sent by enemy, rather than for payload per se.
asciilifeform: btw didja know, mircea_popescu , that yarvin has an rsatron in there ? possibly will be remembered as the only rsatron gnarlier/buggier than kochs's, or even microshit's
asciilifeform: ( all of this assumes that nothing is parallelized. asciilifeform in particular does not like parallelized subcomponents in rsatron, if it can be avoided , tho there aint anyffin wrong with running ~multiple~ rsatrons , on diff inputs, in parallel , if iron is available )
asciilifeform: right. whole affair is 'what's the most general arithmetron that is also a useful rsatron', from my pov.
asciilifeform: and as of right nao it's the only ~complete~ rsatron we have, i.e. that knows how to bake privkeys
asciilifeform: well until last wk it was the only rsatron we had that ran in something like realtime
mircea_popescu: bitcoin rly should come standard in cuntoo anyway. alongside proper rsatron and proper dbtron/webserver.
asciilifeform: if i wanted to continue using closed shitware, i'd be entirely happily fitting rsatron into my 400,000-LUT xilinx etc
amberglint: perhaps the rsatron will fit into this larger chip?
asciilifeform: quasi-relatedly: asciilifeform found out that it is actually possible to fit an rsatron into ice40, if one uses a bit-serial multiplier into external sram. a 4096x4096 mul would then take 8192 clock cycles ( 16384 if counting all load/stores. ) but we can come back to this item laters.
asciilifeform: mircea_popescu earlier emboldened asciilifeform into a 'let's slow but working rsatron sooner, rather than eternal massage, why not massage later' approach.
asciilifeform: ( an iron rsatron would remove some of the need for fast / low-mem ciphration, but imho not all )
mircea_popescu: phf we've all ranted about it at some time or another. needless to say replacement rsatron does not include idiotic half-baked state machines. much like trb-i doesn't include "accounts" nonsense.
asciilifeform: i dun know of a rcf2440 eater & rsatron in php, tho certainly could be made
asciilifeform: re the 'unattended relay' concept, the gnarliest sticking point is the need for a rsatron that can verify a 4096b signature in a few msec, and while running on battery/photocell, not with whole comp
mircea_popescu: but my point is -- by the time this iron actually signs, this iron actually also manages signatures, and therefore this iron actually is a rsatron.
mircea_popescu: if using proper terminal why is it not rsatron ?
asciilifeform: seems more likely that top byte was deliberately set != 0 , this seems to be the custom in erry single rsatron i ran across
a111: Logged on 2018-02-25 21:49 trinque: somebody gimme a better rsatron and I'll use that instead.
trinque: somebody gimme a better rsatron and I'll use that instead.
asciilifeform: ( it is imho unlikely that anyone will demonstrate an rsatron with fewer moving parts than ffa-ch5 )
asciilifeform: diana_coman: in some applications, speed doesn't really matter almost at all. and in those, it is even now possible to, e.g., take ch5 ffa for rsatron.
asciilifeform: Ingolfr_Arnarson: it isn't a complicated item, but does demand a sane rsatron
diana_coman: http://btcbase.org/log/2017-11-14#1737414 <- confirmed; I do NOT use any nextprime or other "rng"-parts from gpg; current rsatron prototype simply grabs nbits from fg, flips the 2 top bits and 1 bottom bit as per previous discussion and then checks if result is prime; if prime then keep, otherwise discard and try again; no "add 2 until prime" or other such thing ☝︎
asciilifeform: i must say even sadder noose, i dun have an rsatron that fits in irc line either...
a111: Logged on 2017-10-19 01:28 trinque: when there's a republican rsatron, I'll immediately be moving deedbot to that.
trinque: when there's a republican rsatron, I'll immediately be moving deedbot to that.
mircea_popescu: yeah well. there's no ~= in this arithmetic. if rsatron has been in production for a while and functioning correctly we can revisit these.
asciilifeform: modexp ~= rsatron ( there is also keygen, but from pov of gedankenexperiment re 'what bandwidth?' you dun need it )
mircea_popescu: the rsatron.
asciilifeform: but in light of this, a correct rsatron is still one that stands on nothing BUT the assumption that rsa is hard.
asciilifeform: let's see who has usable rsatron first, asciilifeform or diana_coman ...
asciilifeform: i won't put my signature on a leaking rsatron. but i also grasp 'go to war with the shovel you have', we're for instance still using rotten ol' gpg.
asciilifeform: imho using a nonfixedtime rsatron in realtime, is worse than not using any crypto at all
asciilifeform: mircea_popescu: is a barrettian ( theoretically 1s/4096 ) rsatron, usable ?
asciilifeform: and it needs to go down 25-50x to make for a usable rsatron.
mircea_popescu: i was thinking of the rsatron
a111: Logged on 2017-08-28 20:03 asciilifeform: in other noose, https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-tang.pdf >> http://wotpaste.cascadianhacker.com/pastes/Gw8Sr/?raw=true << ever wonder what 'power management' controller is actually for ? ( answer: fault injection, so nsa can help your, e.g., chineseremaindertheorem-using rsatron, shit out privkey )
asciilifeform: in other noose, https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-tang.pdf >> http://wotpaste.cascadianhacker.com/pastes/Gw8Sr/?raw=true << ever wonder what 'power management' controller is actually for ? ( answer: fault injection, so nsa can help your, e.g., chineseremaindertheorem-using rsatron, shit out privkey )
asciilifeform: other problem is that there is a small but finite probability of misfires in rsatron , such that would leak a bit.
asciilifeform: the duty of the rsatron author is ~to get the fuck out of the way~
asciilifeform: it is a matter strictly between the fella generating the key, and his wot, not for the author of rsatron.
asciilifeform: no moar 'we heathens have faster rsa because mother dropped us as babies and our rsatron does different work on different hamming weights'
mircea_popescu: otherwise why implement a ptron rather than simply a rsatron.
mircea_popescu: and incidentally, pss should prolly be in the final tmsr-rsatron huh.
asciilifeform: i understand what is meant by 'prototype', but an rsatron (ignoring for a moment the constant-time thing) that uses fermat's primality test as the sole probe, is analogous to a grenade with a half second fuse
asciilifeform: sina: currently there is exactly 1 rsatron that anybody worth mentioning uses, gpg. which is a sad joke in 9,001 ways, and slated for replacement
mod6: <+asciilifeform> which, btw, imho is intrinsically unsuitable for a fits-in-head rsatron, it is extremely gnarly and uses float approximations that get magically unfudged back to int, etc << ugh. right.
asciilifeform: which, btw, imho is intrinsically unsuitable for a fits-in-head rsatron, it is extremely gnarly and uses float approximations that get magically unfudged back to int, etc
asciilifeform: generalization of karatsuba, but pretty useless for fitsinhead rsatron imho
asciilifeform: part of what asciilifeform was even doing re 'p' is answering the q of 'what is the minimal practical rsatron'
asciilifeform: pretty lulzy, jmpless rsatron then
asciilifeform: in some critical applications (airplane, rsatron) this is still unacceptable and hence spark
mircea_popescu: are you making the rsatron or aren't you ?
a111: Logged on 2017-06-17 19:45 asciilifeform: hypothetically i could even do it ( supposing your rsatron is mains-powered ) by observing the imperceptible dimming of the room lights, from 5km away
asciilifeform: hypothetically i could even do it ( supposing your rsatron is mains-powered ) by observing the imperceptible dimming of the room lights, from 5km away
asciilifeform: supposing you were using gpg ( or pretty much any other rsatron )
asciilifeform: if loops were unrolled, you could have not merely a non-branchingonsecrets rsatron, but wholly nonbranching !
asciilifeform: if rsatron becomes slightly more readable, and a dozen lines shorter, and less 'clever', and as result generating key takes two days instead of 1 -- i call it a win!!
mircea_popescu: smart thing would be to replace it with a proper rsatron
mircea_popescu: i dunno, i have no actual math to show, but intuitively it seems to me the above "take 64 bytes of rng, iterate hash over the first 60 last 4-times and then use that as tape to pad message, then put padded message + 64 bytes in question in rsatron" is practically useful and theoretically strong.
a111: Logged on 2016-11-03 03:12 asciilifeform: ftr i am not making mechanical rsatron.
a111: Logged on 2016-11-03 03:12 asciilifeform: ftr i am not making mechanical rsatron.
asciilifeform: ftr i am not making mechanical rsatron.
asciilifeform: i have not succeeded in coming up with a 6502 rsatron that manages to generate a key before the battery (of any reasonable size) and the owner's patience give way.
asciilifeform has been living with all of this, in today's thread, and more, while working on the inevitable ada bignumtron and rsatron.