1089 entries in 0.631s
BingoBoingo: fluffypony: neither. Pick beast from the 80's and write it to a cheap
FPGA dev board
ozbot: Starting a new
FPGA mining farm/contract Cognitive Resurrected on[Havelock]
ozbot: Starting a new
FPGA mining farm/contract Cognitive Resurrected on[Havelock]
ozbot: Starting a new
FPGA mining farm/contract Cognitive Resurrected on[Havelock] | Page 109 | Bitcointa.l
ozbot: Starting a new
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ozbot: Starting a new
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tg2: shit even shoddy first gen sha
fpga's are still being sold lol
decimation: That 'therac-25' incident is interesting, thanks for the tip. If you are making a 'firmware interlock' for a radiation machine, I would think you would at least make it in TTL or on an
FPGA or something.
ozbot: Starting a new
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ozbot: Starting a new
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ozbot: Starting a new
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ozbot: Starting a new
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ozbot: Starting a new
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ozbot: Starting a new
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ozbot: Starting a new
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mike_c:
fpga that did blockchain parsing would completely ignore tx malleabiality (as it should). PEP would tell you WHY you are ignoring it, so when you are writing custom shit you don't mess it up.
mike_c: my counterargument was that a formal definition (be it BNF or
fpga) of those is less useful than an english spec explaining rationale.
BingoBoingo: Rpi might actually be an interesting thing if maybe they would have went MIPS (or
FPGA and pick a core of choice) and offered ECC Ram
ozbot: Starting a new
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Azelphur: that's one of my things I'd like to work on in the future, he asked for the 6 month plan, which goes beyond the
FPGA ;)
Azelphur: and baring in mind he's pretty much perfectly qualified (number theory /
fpga) it'll be interesting to see what he comes up with
Azelphur: but you do have a point, I could get our
FPGA guy to post some stuff
Azelphur: mircea_popescu: perhaps, but our
FPGA engineer isn't (I picked the engineer myself)
ozbot: Starting a new
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BingoBoingo: asciilifeform: Turing coin? That ultimate
FPGA coin you've mentioned before.
benkay: sounds like the xilinx tools are designed to implement a certain set of routines in silicon but the silicon itself can't change the implemented routines until you bake the configuration of the
fpga into the
fpga itself. am i close?
ozbot: Starting a new
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ozbot: Starting a new
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mircea_popescu: "It is possible to do scrypt with a
fpga, so that implies asic is possible too."
BingoBoingo: asciilifeform: Any particular
FPGA toolchains worth leaning or do they get replaced too soon.
benkay: asciilifeform: examples: targeting
fpga's; dynamic workfns (as you mentioned); sorcery resistance
BingoBoingo: Seems for Litecoin devotees this insanity is going to be magnified as CoinDesk has just reprinted so many people's "press releases" about impending litecoin ASICs and if a single manufacterer delivers it will have meant Litecoin skipped that awkward
FPGA adolescence while still staying a fraction of a fraction of bitcoin
mircea_popescu: consequently, the first
fpga's were pretty much a potluck affair
benkay: what kind of hashing scenario would target
fpga's well?
topace: or, for most of the
fpga's trade-in value
jborkl: the size of a old
fpga single
benkay: timecube
fpga buttcorn minors
ozbot: Starting a new
FPGA mining farm/contract Cognitive Resurrected on [BTC-TC]
dexX7: mircea_popescu: i just wanted to exploit this rare situation of "lecturing you" :) scrypt is designed in a way that the bottleneck is rather the amount of fast accessible memory than computational speed and people say "litecoin is
fpga/asic resistant" for that reason
Azelphur: the massive GPU difficulty spike, then the massive
FPGA difficulty spike, and the Mt. Gox hack that dropped the exchange rate to practically zero
benkay: an interesting question is how many btc would be required to buy enough GPU/
FPGA horsepower to effect a 51% attack
mod6: i suppose that something like urbit could actually live inside of other software eventually as some sort of embedded system. or if it ever took the leap to native hardware, it could run on some sort of
FPGA or pre-set asic chip.
pankkake: Pending "Scrypt ASIC will exist in 2013", haha, I like this one. have we even seen a
fpga?
MilkyLep: cointerra recently showed thier
fpga if im not mistaken
benkay: (
fpga's or loosened out asics...w/e)
benkay: although
fpga arrays are how i'm going to heat the next office
chaang-noi: well... im not pro bfl at all.... i was one of the first to call bs on the specs, and that was
fpga shit
ozbot: Starting a new
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jurov: they got
FPGA-like power/perfomrance ratio
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mircea_popescu: that's one sad turn of events tbh, they certainly impressed back in the
fpga days when they figured out what old chips bfl sanded off to pass as their ip
Hollywood: Well BFL I think (someone correct me that can remember more)
fpga was off by 300% on power, Asic was off by 300% on power
gecko_x2: til year end and the difficulty is expected to be much higher at that time. It's also worth pointing out that
FPGA era products were still very valuable well into ASIC generation rollout, and the relative power difference between 65nm and 28nm is much much less. "
bgupta: singles where
FPGA based, no?
ozbot: COGNITIVE: Model
FPGA Performance | BMF
ozbot: Starting a new
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smidge: why, do we have upcoming ipos of people posting
fpga pics?
smidge: namworld you first need a picture of a
fpga to enable ipo frenzy
userioao: well it doesn't help we just got a photo of
fpga plugged into 3g router
Chaang-Noi: i joined the forum to troll bfl with thei
fpga claims of power.. they were 4005 off and i won a bet