log
127 entries in 0.504s
a111: Logged on 2019-04-17 18:33 asciilifeform: meanwhile, in february, chinese 'gowin semiconductor co' cloned ice40. but if anyone thought this means 'open spec', guess again, only worx with their 'YunYuan' closed shitware toolchain.
mp_en_viaje: !!gettrust ice40
asciilifeform: mp_en_viaje: knowing 0 aside from the product , i would say it is not correct to put wolf in the company of koch -- wolf actually did sumthing nontrivial and useful ( mapped out the ice40 matrix )
asciilifeform: mp_en_viaje: (as you can read further downthread) the misfortunate thing is that died before got anywhere near mature ice40 tool.
a111: Logged on 2019-04-17 18:29 asciilifeform: meanwhile, apparently (last yr) in heathendom, https://archive.is/UVbUE << c. wolf , author of the ice40 open fpga toolchain , apparently barfed and 'went naggum'
asciilifeform: the ice40 people , arguably 'solved half of the problem' -- they found a reasonably homogeneous chip so that they could describe the actual connections. but apparently were unable to map out the delays.
asciilifeform: as it stands, it is just about impossible, presently, to bake even very simple dram controller for ice40
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
bvt: asciilifeform: isn't ice40 a done thing, i.e. is there anything else to add to it?
asciilifeform: aand last update on the ice40 page seems to be 30 jan '18. so nuffin happened there since i 1st found it. ( there was, at one point, e.g. talk of support for the larger lattice co. chips )
asciilifeform: meanwhile, in february, chinese 'gowin semiconductor co' cloned ice40. but if anyone thought this means 'open spec', guess again, only worx with their 'YunYuan' closed shitware toolchain. ☟︎
asciilifeform: meanwhile, apparently (last yr) in heathendom, https://archive.is/UVbUE << c. wolf , author of the ice40 open fpga toolchain , apparently barfed and 'went naggum' ☝︎☟︎
asciilifeform: OriansJ: if you're interested in concrete approach of asciilifeform to design of iron, i invite to study http://nosuchlabs.com/hardware.html , item asciilifeform designed & sold ( two runs sold out 100% , possibly in near future we bake a 3rd, on ice40 and photoscintillator , as discussed in logs )
asciilifeform: OriansJ: if i'm baking e.g. dram refresher -- then quite easily (and very frustratingly, in actual practice did, it is why it is ~impossible to bake a decent dram controller from scratch using fpga that hasn't been 'solved' ice40-style )
asciilifeform: OriansJ: i specifically picked the part for this attribute. ( ice40 was not 'solved' yet at the time , but it has quite similar topology )
OriansJ: spyked: well the iCE40 is a good starting point for now and I guess we can agree on that. You are right about not having to be portable but I prefer building a stack that can be used to defend against a Nexus Intruder program class attack.
spyked: http://btcbase.org/log/2019-04-05#1907037 <-- on the longer term, something along the lines of http://btcbase.org/log-search?q=ice40 ; on the shorter, http://btcbase.org/log-search?q=apu / http://btcbase.org/log-search?q=rk ☝︎
a111: Logged on 2019-03-17 18:55 mircea_popescu: IMO it makes no sense adopting the VM, given that apparently mips.v7 will be the republican CPU architecture on ice40. << i very much not agree ; much too soon to standardize this.
bvt: http://btcbase.org/log/2019-03-17#1903106 << i also agree that it is; i don't find myself knowledgable enough to make a decision on the republican cpu architecture, but for bootstrapping using ice40 with its limited resources a simple mips core sounded fitting. ☝︎
mircea_popescu: IMO it makes no sense adopting the VM, given that apparently mips.v7 will be the republican CPU architecture on ice40. << i very much not agree ; much too soon to standardize this. ☟︎
a111: 105 results for "ice40", http://btcbase.org/log-search?q=ice40
asciilifeform: !#s ice40
asciilifeform: 1 annoying aspect of 'iron ffa'-gedankenexperiment, is that none of the available fpga ( either 'ice40' series, or the evil ones ) are anywhere near big enuff to prototype with. it'd have to be simulated a la http://www.loper-os.org/?p=2593 , slowly, and then straight to silicon.
asciilifeform: also made fg-style (iirc even sores posted, and for ice40 no less)
asciilifeform actually dug into subj of implementing compact 'soft' acoustic-modems on e.g. ice40, yr or so ago, for fyootoor applications
asciilifeform: ( there is also a 'giant ice40' that amberglint dug up recently, that gotta be tested, but i dun even physically have 1 yet, and deliberately not bought so as not to distract from moar urgent matters )
asciilifeform: there is also a serpent-on-ice40 thing, with similar level of unfinishitude; and a ice40-powered 'FG2', ditto.
a111: Logged on 2019-01-02 15:31 asciilifeform: mats: i haven't built anyffing useful from ice40 with own hands yet. but, interestingly, when bought a 'scsi2sd' device for replacing disk in bolix box, found that author in fact used ice40 for the job
asciilifeform: mats: i haven't built anyffing useful from ice40 with own hands yet. but, interestingly, when bought a 'scsi2sd' device for replacing disk in bolix box, found that author in fact used ice40 for the job ☟︎
mats: inspired by mocky, http://matshome.net/2019/01/the-ice40-saga
asciilifeform: datashit also reveals a 'Dedicated DDR2/DDR3 and LPDDR2/LPDDR3 memory support with DQS logic, up to 800 Mb/s data-rate', wonder if this is supported in the ice40 chain yet
asciilifeform: my ice40 toolchain demanded no such thing.
amberglint: asciilifeform: the reverse-engineered toolchain for the iCE40 now supports a larger chip, the ECP5 with 85k LUTs (vs ~8k LUTs of iCE40), possibly worth taking a look at: https://github.com/SymbiFlow/prjtrellis
asciilifeform: in other notes from last wk's dig, turns out that ice40 contains onboard otp rom , enuff to store whole config ( somehow i read the docs '9000' times prev. and missed this ).
asciilifeform: ( very sadly, there is not a vhdl eater for ice40. but when looking over subj 2w ago, i actually came to like vhdl, it's ~exactly ada syntax. )
asciilifeform: approx 4x the logic carpet of the fattest ice40, for comparison.
asciilifeform: quasi-relatedly: asciilifeform found out that it is actually possible to fit an rsatron into ice40, if one uses a bit-serial multiplier into external sram. a 4096x4096 mul would then take 8192 clock cycles ( 16384 if counting all load/stores. ) but we can come back to this item laters.
deedbot: http://www.loper-os.org/?p=2627 << Loper OS - Serpent in ICE40, Part 2.
asciilifeform: if i were baking asic ( not sure why anybody would blow 'orbit' moneys on serpent asic, but for the sake of arg ) would unroll the sbox invocation the way it is unrolled in the pc serpent diana_coman is using, there'd be no reason not to have 128 or what, independent copies. but in the tight space of ice40 this is out of the question.
asciilifeform: i've gathered afaik all of the commercial demo boards with ice40, they all have 1 ea.
asciilifeform: imho, if an ice40 can be coaxed into serpenting at , say, 1MB/s, it's worth sumthing, otherwise iffy
asciilifeform: btw, spoiler : i put the thing in an ice40-8k , simply did not have time to write up yet, and the fwd sbox in fact eats roughly 1/4 of the gates . which leaves the orig question wide open...
deedbot: http://www.loper-os.org/?p=2593 << Loper OS - Can the Serpent Cipher fit in the ICE40 FPGA?
asciilifeform: http://btcbase.org/log/2018-10-26#1866516 << this quickly led to dead end, incidentally -- the ice40 'icestorm' proggy dun seem to eat vhdl... ☝︎
asciilifeform: and the q of 'would serpent fit in ice40' is imho also worth answering. i'ma put it in the pipe.
asciilifeform: ice40 eats config from a 8-legged spi rom thing, can socket it.
asciilifeform: incidentally , baking such box doesn't marry to serpent, can replace the ice40's feed rom whenever, with whatever one likes
asciilifeform: upstack -- ran into stack of these 'papers' when cleaning out crud, from 2yr ago when asciilifeform thought 'could make simple ciphered disk from usb2sd chip <-> ice40 <-> sdcard ' )
asciilifeform: mircea_popescu: i'd even settle for something entirely like ice40 but with fuse/antifuse bridges
asciilifeform: the other is political, all of the existing vendors obfuscate and keep seekrit the necessary docs to actually program the thing. ice40 happens to have been reversed, but it is ruinously small ( still ~150x bigger than the miniature xilinx i baked FG from, however , but too small even for 4096bit adder )
asciilifeform: mircea_popescu: recall ice40 ? simple grid of LUTs, + matrix of programmable interconnects.
a111: Logged on 2018-10-23 13:44 asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho
asciilifeform: mircea_popescu: classical FG also fits very reluctantly in servers, but currently i dun have a good idea re what specifically to do about this ( the 'obvious' pill is to have a pci variant, but ice40 is too small for the necessary logic, which in itself is quite gnarly )
asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho ☝︎☟︎
a111: Logged on 2018-09-28 16:56 Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do.
Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do. ☟︎
asciilifeform: ( as it is, ice40 won't even hold ~one~ 4096bit adder ! )
asciilifeform: Mocky: in the past i attempted a fpga rsa also. sadly the 'ice40' would need to be about 250x bigger, for it to be bakeable
asciilifeform: for instance, i might like to bake a box with ice40 as 'mips cpu' and http://btcbase.org/log/2017-08-23#1702696 for main memory. and then for ~2k usd you can have... 16MB . and what to run on that. ☝︎
asciilifeform: mircea_popescu: i had'em for the ice40 thing, which demands such horrors as python3 etc
asciilifeform: http://btcbase.org/log/2018-09-04#1847498 << iirc i answered this in the past, but this thread makes it even moar obvious what the pill is : make a hypertrophied ice40 (i.e. homogeneous lattice of gates.) with these, can bake alt-juniper, alt-pc, crypto, pretty much anyffing you like. ☝︎
asciilifeform: the ice40 tops out at 250MHz (and drops rapidly when you fill it up, from switch fabric propagation delay)
asciilifeform: mircea_popescu: so happens i have a seekrit draft of ice40+isa toy
asciilifeform: ( not even sure it'd fit on an ice40 )
a111: Logged on 2018-07-18 14:16 asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'.
asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'. ☟︎
asciilifeform: ice40 + a coupla MB of sram -- and you can (not very quickly, but) crypto.
asciilifeform: http://btcbase.org/log/2018-07-06#1832308 << to expand on this, with the linked mips example, already can haz e.g. 32bit cpu with no pipeline, no cache, etc ~but~ fits in ice40. ☝︎
a111: Logged on 2018-07-06 14:17 ave1: thx! now if anyone can be bother to design a board with multiple ice40
asciilifeform: ice40, unlike the xilinx cplds, also includes 32kB of onboard sram. so possibly can have small cache, or extra registers, or some other useful item.
asciilifeform: ( ice40 is about a dozen times larger )
ave1: thx! now if anyone can be bother to design a board with multiple ice40 ☟︎
asciilifeform: the ice40 breakthrough however means that we can be own mips producer.
asciilifeform: asciilifeform in particular would like a gnat for mips, given as the latter actually fits in an ice40
asciilifeform: the holy grail would be to stuff this into a fpga. however ice40 isn't even remotely bigenuff.
asciilifeform: ( better yet, ice40 lappy. but 'if wishes were horses' etc )
asciilifeform: understand, i can have ice40 boards to fit lappy chassis roll off conveyor in 6mo, if i want.
asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
a111: 46 results for "ice40", http://btcbase.org/log-search?q=ice40
asciilifeform: !#s ice40
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series ) ☟︎☟︎☟︎☟︎
asciilifeform: how close this item is, even optimistically, depends on whether it could fit in ice40-8k.
a111: Logged on 2017-08-31 22:44 asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
a111: Logged on 2017-09-01 15:38 asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX
a111: Logged on 2017-08-31 22:23 asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago )
mod6: <+asciilifeform> in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX << cool
asciilifeform: ( https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/ << iron component of subj )
asciilifeform: ( olimex sells a little adapter that bolts vga db15 plug and minidin ps/2 to the ice40-1k and -8k boardz )
asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX ☟︎
asciilifeform: shinohai: i was playing with the ice40 ~decompiler~ -- not much use in battlefield, but does give interesting picture of how your netlist ends up sitting down on the iron
a111: Logged on 2017-08-31 22:26 asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders...
asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. ) ☝︎☟︎
asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders... ☟︎
asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago ) ☟︎
a111: 28 results for "ice40", http://btcbase.org/log-search?q=ice40
asciilifeform: !#s ice40
asciilifeform: tldr : a serious sanecomp board would feature a , say, 16 x 16 ~grid~ of ice40-8k.