log
94 entries in 0.499s
asciilifeform: in other notes from last wk's dig, turns out that ice40 contains onboard otp rom , enuff to store whole config ( somehow i read the docs '9000' times prev. and missed this ).
asciilifeform: ( very sadly, there is not a vhdl eater for ice40. but when looking over subj 2w ago, i actually came to like vhdl, it's ~exactly ada syntax. )
asciilifeform: approx 4x the logic carpet of the fattest ice40, for comparison.
asciilifeform: quasi-relatedly: asciilifeform found out that it is actually possible to fit an rsatron into ice40, if one uses a bit-serial multiplier into external sram. a 4096x4096 mul would then take 8192 clock cycles ( 16384 if counting all load/stores. ) but we can come back to this item laters.
deedbot: http://www.loper-os.org/?p=2627 << Loper OS - Serpent in ICE40, Part 2.
asciilifeform: if i were baking asic ( not sure why anybody would blow 'orbit' moneys on serpent asic, but for the sake of arg ) would unroll the sbox invocation the way it is unrolled in the pc serpent diana_coman is using, there'd be no reason not to have 128 or what, independent copies. but in the tight space of ice40 this is out of the question.
asciilifeform: i've gathered afaik all of the commercial demo boards with ice40, they all have 1 ea.
asciilifeform: imho, if an ice40 can be coaxed into serpenting at , say, 1MB/s, it's worth sumthing, otherwise iffy
asciilifeform: btw, spoiler : i put the thing in an ice40-8k , simply did not have time to write up yet, and the fwd sbox in fact eats roughly 1/4 of the gates . which leaves the orig question wide open...
deedbot: http://www.loper-os.org/?p=2593 << Loper OS - Can the Serpent Cipher fit in the ICE40 FPGA?
asciilifeform: http://btcbase.org/log/2018-10-26#1866516 << this quickly led to dead end, incidentally -- the ice40 'icestorm' proggy dun seem to eat vhdl... ☝︎
asciilifeform: and the q of 'would serpent fit in ice40' is imho also worth answering. i'ma put it in the pipe.
asciilifeform: ice40 eats config from a 8-legged spi rom thing, can socket it.
asciilifeform: incidentally , baking such box doesn't marry to serpent, can replace the ice40's feed rom whenever, with whatever one likes
asciilifeform: upstack -- ran into stack of these 'papers' when cleaning out crud, from 2yr ago when asciilifeform thought 'could make simple ciphered disk from usb2sd chip <-> ice40 <-> sdcard ' )
asciilifeform: mircea_popescu: i'd even settle for something entirely like ice40 but with fuse/antifuse bridges
asciilifeform: the other is political, all of the existing vendors obfuscate and keep seekrit the necessary docs to actually program the thing. ice40 happens to have been reversed, but it is ruinously small ( still ~150x bigger than the miniature xilinx i baked FG from, however , but too small even for 4096bit adder )
asciilifeform: mircea_popescu: recall ice40 ? simple grid of LUTs, + matrix of programmable interconnects.
a111: Logged on 2018-10-23 13:44 asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho
asciilifeform: mircea_popescu: classical FG also fits very reluctantly in servers, but currently i dun have a good idea re what specifically to do about this ( the 'obvious' pill is to have a pci variant, but ice40 is too small for the necessary logic, which in itself is quite gnarly )
asciilifeform: http://btcbase.org/log/2018-10-23#1865312 << ideally we oughta bake the new one, with ice40 & scintillator, imho ☝︎
a111: Logged on 2018-09-28 16:56 Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do.
Mocky: re: ice40 x250 and other projects: If I get a toe hold in Qatar, they have a 'free zone' to entice foreign R&D and tech startups which permits a new company to have 100% foreign owners, 0% tax on profits, duty free import/export. But requires them to like you and what you're trying to do.
asciilifeform: ( as it is, ice40 won't even hold ~one~ 4096bit adder ! )
asciilifeform: Mocky: in the past i attempted a fpga rsa also. sadly the 'ice40' would need to be about 250x bigger, for it to be bakeable
asciilifeform: for instance, i might like to bake a box with ice40 as 'mips cpu' and http://btcbase.org/log/2017-08-23#1702696 for main memory. and then for ~2k usd you can have... 16MB . and what to run on that. ☝︎
asciilifeform: mircea_popescu: i had'em for the ice40 thing, which demands such horrors as python3 etc
asciilifeform: http://btcbase.org/log/2018-09-04#1847498 << iirc i answered this in the past, but this thread makes it even moar obvious what the pill is : make a hypertrophied ice40 (i.e. homogeneous lattice of gates.) with these, can bake alt-juniper, alt-pc, crypto, pretty much anyffing you like. ☝︎
asciilifeform: the ice40 tops out at 250MHz (and drops rapidly when you fill it up, from switch fabric propagation delay)
asciilifeform: mircea_popescu: so happens i have a seekrit draft of ice40+isa toy
asciilifeform: ( not even sure it'd fit on an ice40 )
a111: Logged on 2018-07-18 14:16 asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'.
asciilifeform: ave1: that'll be the gold medalist, as it will run on ice40 , i.e. 'tmsr cpu'.
asciilifeform: ice40 + a coupla MB of sram -- and you can (not very quickly, but) crypto.
asciilifeform: http://btcbase.org/log/2018-07-06#1832308 << to expand on this, with the linked mips example, already can haz e.g. 32bit cpu with no pipeline, no cache, etc ~but~ fits in ice40. ☝︎
a111: Logged on 2018-07-06 14:17 ave1: thx! now if anyone can be bother to design a board with multiple ice40
asciilifeform: ice40, unlike the xilinx cplds, also includes 32kB of onboard sram. so possibly can have small cache, or extra registers, or some other useful item.
asciilifeform: ( ice40 is about a dozen times larger )
ave1: thx! now if anyone can be bother to design a board with multiple ice40
asciilifeform: the ice40 breakthrough however means that we can be own mips producer.
asciilifeform: asciilifeform in particular would like a gnat for mips, given as the latter actually fits in an ice40
asciilifeform: the holy grail would be to stuff this into a fpga. however ice40 isn't even remotely bigenuff.
asciilifeform: ( better yet, ice40 lappy. but 'if wishes were horses' etc )
asciilifeform: understand, i can have ice40 boards to fit lappy chassis roll off conveyor in 6mo, if i want.
asciilifeform: j2 at least has the virtue of being small, and fitting in ice40 fpga.
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
a111: 46 results for "ice40", http://btcbase.org/log-search?q=ice40
asciilifeform: !#s ice40
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
a111: Logged on 2018-01-04 20:06 asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
asciilifeform: in other 'news', it is apparently impossible to fit even ONE 4096-bit adder into an ice40-8k ( the largest in the series )
asciilifeform: how close this item is, even optimistically, depends on whether it could fit in ice40-8k.
a111: Logged on 2017-08-31 22:44 asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. )
a111: Logged on 2017-09-01 15:38 asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX
a111: Logged on 2017-08-31 22:23 asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago )
mod6: <+asciilifeform> in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX << cool
asciilifeform: ( https://www.olimex.com/Products/FPGA/iCE40/iCE40-IO/ << iron component of subj )
asciilifeform: ( olimex sells a little adapter that bolts vga db15 plug and minidin ps/2 to the ice40-1k and -8k boardz )
asciilifeform: in very very other noose : the vendor's vga and ps/2 kbd demo verilog for ice40 builds and WORX
asciilifeform: shinohai: i was playing with the ice40 ~decompiler~ -- not much use in battlefield, but does give interesting picture of how your netlist ends up sitting down on the iron
a111: Logged on 2017-08-31 22:26 asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders...
asciilifeform: phf et al : to briefly continue http://btcbase.org/log/2017-08-31#1707895 -- picture an a4-sized plinth, of, e.g., 32 dimm slots. each can contain a card of sram, or alternatively of 4 ice40-8k's, or some peripheral ( e.g. nic magnetics. ) ☝︎
asciilifeform: phf: at some point ( and by this i mean when finished ffa / released 'p' ... ) i'ma have a large board made, with, say, 8 ice40-8k's, and row of dimm-holders...
asciilifeform: since we're on subj, asciilifeform got the recently released ice40-8k (largest in the series) going. ( there's only 1 decent dev board for the 8k, the one released by olimex ~2wks ago )
a111: 28 results for "ice40", http://btcbase.org/log-search?q=ice40
asciilifeform: !#s ice40
asciilifeform: tldr : a serious sanecomp board would feature a , say, 16 x 16 ~grid~ of ice40-8k.
asciilifeform: primarily because just a basic nic controller itself would take up a whole ice40 ( ice is their low-end, barebones cpld series, and was reverses without any cooperation - through kicking and screaming of, even - lattice co )
a111: Logged on 2017-08-21 21:18 asciilifeform: !~later tell spyked http://btcbase.org/log/2017-08-21#1701446 >> on second thought, you probably could put this chore off, olimex sells a ice40-8k (largest available) with 512k of sram glued on. and this is theoretically enough to prototype . the more pressing matter is ethernet. ( afaik nobody sells an ice40 + ethernetmagnetics . and just as with ddr dram, answer is 'lattice wants you to use their larger fpgas, with THEIR toolchain'
a111: Logged on 2017-08-21 12:05 spyked: ok, so to sum up; 1. get ice40 fpga; 2. run fpga lisp machine (cadr?); work from that towards symbolics/ivory, or the other way around starting from symbolics.
asciilifeform: https://www.digikey.com/products/en/integrated-circuits-ics/embedded-fpgas-field-programmable-gate-array/696?k=ice40&k=&pkeyword=ice40&pv1328=i960&FV=ffe002b8&mnonly=0&ColumnSort=-457&page=1&quantity=0&ptm=0&fid=0&pageSize=25 << e.g.
asciilifeform: spyked: unless you are VERY well-equipped, you will not be soldering ice40.
asciilifeform: ice40 leaves a great deal to be desired ( it is VERY small, comparatively, and doesn't come in a no-flash version, and who knows for how long it will remain in print ) but is by far the closest thing that currently exists to the sane fpga.
asciilifeform: spyked: only the ice40 series
spyked: asciilifeform, was going to ask. is there particular ice40 you're recommending? it might be a while until I get one but I looked over the list and they had various types (ultralite etc.)
asciilifeform: !~later tell spyked http://btcbase.org/log/2017-08-21#1701446 >> on second thought, you probably could put this chore off, olimex sells a ice40-8k (largest available) with 512k of sram glued on. and this is theoretically enough to prototype . the more pressing matter is ethernet. ( afaik nobody sells an ice40 + ethernetmagnetics . and just as with ddr dram, answer is 'lattice wants you to use their larger fpgas, with THEIR toolchain' ☝︎
asciilifeform: to do this, will need to make world's first ice40+ddr board -- none exist
spyked: ok, so to sum up; 1. get ice40 fpga; 2. run fpga lisp machine (cadr?); work from that towards symbolics/ivory, or the other way around starting from symbolics.
mircea_popescu: http://btcbase.org/log-search?q=ice40
asciilifeform: it is almost like the ice40 aficionados are following the 'bolix-whisperers' 'we dun wanna piss off dks!111' school of thought
asciilifeform: the working turdless-chain series is the ice40, up to 8k gate.
asciilifeform: that is not an ice40!!!
asciilifeform: very imho interestingly, NOBODY manufactures a board with an ice40 and a nontrivial qty of ram together.
asciilifeform: in possibly more interesting noose, ice40 toolchain seems to build and work ok even on crapple.
asciilifeform: ice40 series tops out at 250Mhz iirc, so it'd be a modest thing. but working.
a111: Logged on 2017-08-04 14:54 asciilifeform: so can haz ice40!!!!
asciilifeform: so can haz ice40!!!!
asciilifeform: in other noose, asciilifeform built 'icestorm', 'arachne-pnr', with plain gcc 4.9 ( the only concession to idiocy on the test machine was python3 ) . and even MOST of 'yosys' ( the last step in the ice40 open sores fpga toolchain ) built. in fact, whole thing built, but linker barfs
a111: Logged on 2017-08-03 23:02 asciilifeform: to add insult to injury, even BROWSING shithub ( where all of the 'open' ice40 projects live ) no longer works on any of my graphical wwwtrons
asciilifeform: to add insult to injury, even BROWSING shithub ( where all of the 'open' ice40 projects live ) no longer works on any of my graphical wwwtrons
a111: Logged on 2017-01-16 23:36 asciilifeform: leaving entirely aside the question of whether ice40 can in fact be made to do anything useful with the 'open' toolchain discussed earlier, or whether a toolchain that required clang, llvm, and ten other poetteringesque abortions is 'open'
asciilifeform: leaving entirely aside the question of whether ice40 can in fact be made to do anything useful with the 'open' toolchain discussed earlier, or whether a toolchain that required clang, llvm, and ten other poetteringesque abortions is 'open'
asciilifeform: (is it the lattice ice40? then why not SAY IT motherfucker)
ascii_field: 'We have enough bits mapped that we can create a functional verilog model for almost all bitstreams generated by Lattice iCEcube2 for the iCE40 HX1K-TQ144, as long as no block memories or PLLs are used. ' << wake me up when that last part changes. and when i can get this chip from ten different chinese foundries.