log☇︎
48 entries in 0.768s
a111: Logged on 2019-07-30 14:22 ave1: jurov: Thanks!, I'll try it, but are all these lisp (sbcl, ecl etc) version 2 or 1?
jurov: sbcl, ecl, ccl are all Common Lisp (notice the big C) implementations
ave1: jurov: Thanks!, I'll try it, but are all these lisp (sbcl, ecl etc) version 2 or 1? ☟︎
a111: Logged on 2017-06-30 18:04 asciilifeform: ecl is a 'black art' incidentally. for instance, it runs 'backwards' voltagewise, with ground-as-positive, and needs negative supply
a111: 42 results for "ecl", http://btcbase.org/log-search?q=ecl
asciilifeform: !#s ecl
asciilifeform: i can't picture why, even, unless these people baked it from ecl or sumthing
asciilifeform: ( bake it in ECL, then get 'for phree' not only constant-time, but constant-current.
a111: Logged on 2017-08-31 19:14 phf: jack daniel or whatever his name (ECL guy, who's working on CLIM) made actual progress on the codebase (though some percent of it is wracker work) despite and since being condemned by g_l. i'm not quite sure what g_l did meanwhile..
phf: jack daniel or whatever his name (ECL guy, who's working on CLIM) made actual progress on the codebase (though some percent of it is wracker work) despite and since being condemned by g_l. i'm not quite sure what g_l did meanwhile.. ☟︎
a111: Logged on 2017-05-16 01:55 asciilifeform: for bonus 'ourdemocracy' decapitation, bake it out of ECL logic
asciilifeform: but interestingly is extremely well-suited for crypto in particular : an ecl gate consumes SAME current regardless of what it is doing
asciilifeform: ecl is a 'black art' incidentally. for instance, it runs 'backwards' voltagewise, with ground-as-positive, and needs negative supply ☟︎
asciilifeform: to revisit the tta cpu thing : i investigated 'can haz ecl?' and found reasonably priced 4+GHz discrete logic
asciilifeform: could make nsa-free cpu out of stock ecl logic, a few dozen ics.
asciilifeform: for bonus 'ourdemocracy' decapitation, bake it out of ECL logic ☟︎
asciilifeform: trinque: iirc he stuffed ecl in there
a111: Logged on 2016-08-22 11:27 jurov: re: eulora build system. last i saw it still carried crap like --with-hunspell . And when i tried to add configure option for ecl support.. i just gave up, it uses jam with poorly documented custom CS extensions.
jurov: re: eulora build system. last i saw it still carried crap like --with-hunspell . And when i tried to add configure option for ecl support.. i just gave up, it uses jam with poorly documented custom CS extensions. ☟︎
a111: Logged on 2016-08-05 08:46 jurov: i just have embedded ecl in eulora and made quite a complete functionality available to it
jurov: i just have embedded ecl in eulora and made quite a complete functionality available to it ☟︎
jurov: well, after light usage i found bugs in core functionality in ecl, like it ignored *TRACE-OUTPUT*
phf: i thought ecl and sbcl are the only lisps that are in active development
a111: Logged on 2016-06-07 01:28 phf: http://btcbase.org/log/2016-06-03#1475432 << i've used it, and the wukix people are responsive to feature requests. i think the source is a fork of one of kyoto common lisp derivatives, probably akcl. fwiw it's the same lineage as gcl and ecl, so ascii's "why not compile ecl" is entirely reasonable
phf: http://btcbase.org/log/2016-06-07#1477855 << actually research done by ECL people claims that mocl is derivative of this project http://www.informatik.uni-kiel.de/~wg/clicc.html (via https://common-lisp.net/project/ecl/static/quarterly/img/vol4/all-hierarchy.png) ☝︎
asciilifeform: phf: iirc ecl is kyoto.
phf: http://btcbase.org/log/2016-06-03#1475432 << i've used it, and the wukix people are responsive to feature requests. i think the source is a fork of one of kyoto common lisp derivatives, probably akcl. fwiw it's the same lineage as gcl and ecl, so ascii's "why not compile ecl" is entirely reasonable ☝︎☟︎
asciilifeform: alternatively ben_vulpes could simply build, e.g., ecl, for ios
assbot: this simple function always segfaults - at least on linux amd64 (#225) · Issues · Embeddable Common-Lisp / ECL · GitLab ... ( http://bit.ly/1p1F3WH )
jurov: now something for lisp afficionados: https://gitlab.com/embeddable-common-lisp/ecl/issues/225 #TheShitJurovDoes #BackdooringEulora
ben_vulpes: asciilifeform: and the reason you picked tinyscheme over say ecl is...footprint? dreppers in ecl?
decimation: "Each cable between the modules was a twisted pair, cut to a specific length in order to guarantee the signals arrived at precisely the right time and minimize electrical reflection. Each signal produced by the ECL circuitry was a differential pair, so the signals were balanced. " < https://en.wikipedia.org/wiki/Cray-1
decimation: the original 'cray' machines used differential ecl lines
jurov: btcg: if you can synthsize it from ECL chips, no prob
jurov: ah that. so, thinking about ECL, one basically needs to put together 2x80 identical circuits for two rouds of SHA1, and pipeline them, no?
asciilifeform: ecl miners probably live on the same planet as gallium arsenide, etc. miners.
asciilifeform: jurov: check out a modern catalogue (e.g., 'digikey') - you can get ecl parts going into double-digit GHz
asciilifeform: my symbolics lisp mach., interestingly, has a board with a good number of ecl discretes. turned out, this was the framebuffer. it was the only way to crunch ~200MHz at the time
asciilifeform: jurov: ecl (emitter-coupled logic) is a supposedly-obsolete way to build logical circuits (on any particular semiconductor chemistry) where a transistor is kept near switching point at all times, gaining speed at the expense of economy
jurov: really? how quickly ECL logic can do, say, one SHA step?
asciilifeform: http://ummr.altervista.org/scansTEKECL.jpg << these (or, more realistically, modern) ECL discretes would probably outperform a modern integrated miner, were they to be built into a (washing-machine-sized) one...
asciilifeform: build an adder out of GaAs ECL logic.
decimation: asciilifeform: yeah I forgot about ECL. The point is, discrete logic need not be slow. However, at high speeds propagation delay is going to be a serious issue, which implies distributed clockless dataflow design.
asciilifeform: decimation: ECL easily gives you 50-80 GHz
asciilifeform: decimation: GHz 7400 parts: ECL?
asciilifeform: (you can buy ~50GHz+ ECL gates from mouser, or whoever)
asciilifeform: does anyone even remember how to design with ECL circuits nowadays...
asciilifeform: modern VLSI is very rf-noisy. you could fix this by fabbing the ASICs as ECL (emitter coupled logic)