asciilifeform: ;;later tell mircea_popescu http://log.bitcoin-assets.com/?date=05-01-2015#966169 ☝︎

asciilifeform: damn.

asciilifeform: like 'phantom limb.'

asciilifeform: punkman: [fpga thread] would MIPS be easier than x86? or does the problem lie in connecting the thing to outside world (fast RAM, peripherals, etc) << problem is that you can't make so much as a barrel shifter on any extant fpga without using a closed turd from the vendor - actually, two turds: one in the logic library part itself, other - the synthesis toolchain

asciilifeform: punkman: one can attempt to work with just the synthesis toolchain (no escape from it) and use netlists of 'raw' logic - i.e. simple universal constructs like 'nand gate'. the result - go try it - a very simple kindergarten-level circuit fills up the entire chip, with glacial performance (gate delays measured in msec!)

asciilifeform: this is because the entire fpga concept, as imagined by n00bs to the subject, does not actually work.

asciilifeform: folks doing actual work with fpga make very light use of the general-purpose routing matrix

asciilifeform: and of the LUTs

asciilifeform: mostly they hook up vendor 'library' parts together. these usually (though not always) correspond to miniature 'islands' of asic present on the chip

asciilifeform: e.g., an adder, a shifter, uart, 500 other kinds of part.

asciilifeform: punkman: but back to original question, mips is vastly easier to implement in programmable logic of whatever kind than x86. this ought to be obvious to anyone with even an evening's familiarity with both.

asciilifeform: anyone learn the fate of nanotube yet ?

asciilifeform mutters something about parachutes

asciilifeform: neh i only have a splat.