log☇︎
15 entries in 0.826s
asciilifeform: i find it interesting that google's approach to building cr50 ( 'hardcopy fpga' ) is actually ~moar~ diddleable, via this method, than if they had shipped ordinary fpga
asciilifeform: |\n: best suspicion thus far is that it is a 'hardcopy fpga' (cheap, relatively, method for getting chip baked, they apply a custom metallization mask to a stock crystal)
asciilifeform: http://btcbase.org/log/2017-08-22#1701786 << asic miners. the original 'asics' were actual shaved fpga. the next gen -- were 'hardcopy fpga', the cheapest fab available, where you just get to define metallization layer and naught else ☝︎
asciilifeform: mircea_popescu: to briefly revisit thread, one interesting tidbit you might not know about 'hardcopy fpga' is that it stands on same toolchain as the respective vendor's 'ordinary' fpga (on which one prototypes for the 'hard' variant.)
a111: 6 results for "hardcopy fpga", http://btcbase.org/log-search?q=hardcopy%20fpga
asciilifeform: $s hardcopy fpga
assbot: 4 results for 'hardcopy fpga' : http://s.b-a.link/?q=hardcopy+fpga
asciilifeform: !s hardcopy fpga
asciilifeform: partly this is on account of using 'hardcopy fpga'
assbot: Logged on 08-12-2014 18:26:51; asciilifeform: (re: miner asics: anyone who gives a damn can find, in #b-a logs, my reasonably well-supported hypothesis that miner asic never actually -happened.- that is, there are devices, and they - approximately - work, but they are not 'asics' in the traditional sense. more 'hardcopy fpga.' - actual term of art)
asciilifeform: (re: miner asics: anyone who gives a damn can find, in #b-a logs, my reasonably well-supported hypothesis that miner asic never actually -happened.- that is, there are devices, and they - approximately - work, but they are not 'asics' in the traditional sense. more 'hardcopy fpga.' - actual term of art) ☟︎
asciilifeform: decimation: asic << and here's where the turdmeisters win. many 'asic' products on the market presently are actually 'hardcopy fpga'
mircea_popescu: it'd be really retarded to make asics as fpga hardcopy wtf.
jurov: if avalon is really a fpga's hardcopy, baybe they just used same blob
topace: fpga hardcopy ? its kinda in the middle between fpga and asic