log
10 entries in 0.434s
a111: Logged on 2018-10-23 14:19 asciilifeform: i'ma describe , for the l0gz : ideal cpu for crypto would be something quite like the schoolbook mips.v -- no cache, no branch prediction, no pipeline, no dram controller (run off sram strictly), a set of large regs for multiply-shift , and dedicated pipe to FG (i.e. have single-instruction that fills a register with entropy )
asciilifeform: i'ma describe , for the l0gz : ideal cpu for crypto would be something quite like the schoolbook mips.v -- no cache, no branch prediction, no pipeline, no dram controller (run off sram strictly), a set of large regs for multiply-shift , and dedicated pipe to FG (i.e. have single-instruction that fills a register with entropy )
a111: Logged on 2015-01-22 06:26 asciilifeform: whateverthefuck fpga cpu << http://www.cs.utah.edu/~elb/cadbook/Chapters/Chapter13/mips.v << mips.
a111: 5 results for "mips.v", http://btcbase.org/log-search?q=mips.v
asciilifeform: !#s mips.v
a111: 3 results for "mips.v", http://btcbase.org/log-search?q=mips.v
asciilifeform: !#s mips.v
asciilifeform: 359 mips.v
asciilifeform: stas@humanoid ~ $ wc -l mips.v
asciilifeform: whateverthefuck fpga cpu << http://www.cs.utah.edu/~elb/cadbook/Chapters/Chapter13/mips.v << mips.