asciilifeform: i bring it up because it was another d00d who advocated 1 set of principles : and implemented a very other in code

asciilifeform: erlehmann: funny also that you mention urbit: see thread, http://btcbase.org/log/2016-08-18#1524741 ☝︎

asciilifeform: erlehmann: i followed the man's mathematical work ( and made extensive use of it ) which is why i found it disheartening to watch his intellectual honesty evaporate and the quality of said work, falling through the floor. but his solution to ~nonproblem does not pique my interest, i admit

asciilifeform: the notion that it is separable, is a historic mistake.

asciilifeform: idea is not separable from the originator.

asciilifeform: we don't do 'ideas have own merits'.

asciilifeform: extracting the Stone of Folly ? ☟︎

asciilifeform: the taking of antimony pill ?

asciilifeform: can you picture a renowned surgeon suddenly advocating bloodletting ?

asciilifeform: advocating the ~expanded~ use of prngs.

asciilifeform: he wrote ~entire paper~ on subj

asciilifeform: also joke ?

asciilifeform: erlehmann: how about http://btcbase.org/log/2017-05-31#1663987 ? ☝︎

asciilifeform: *answer mail re

asciilifeform: erlehmann: i have nfi what to make of djb at this point. phuctor is the world's largest public showcase of his 'smooth parts of integers' algo, but he refused -- repeatedly -- to answer main re same. and now he's signed his name to a paper full of howlers, e.g. 'let usg nist generate your private key'

asciilifeform: speaking of which : http://btcbase.org/log/2017-05-31#1663689 ☝︎

asciilifeform: sounds potentially handy.

asciilifeform: and wearing bear skin.

asciilifeform: i'll use a tabcompleteless shell after i start shitting in holes in the ground.

asciilifeform: wants explicit word lists etc

asciilifeform: not same

asciilifeform: well, naked 'sh'

asciilifeform: i consider system lacking tab-completion to be unusable

asciilifeform: i dun think i've ever written anything where the ~naked~ build -- no 'intelligence' -- would be >250 ln of bash

asciilifeform: because the thing is monolithic

asciilifeform: and make systems do NOTHING to help there anyway

asciilifeform: but i do not often deal in those.

asciilifeform: the one possible exception might be ~massive~ fpga floor layouts

asciilifeform: if your program is large, and build time is a bottleneck : Your Program Is Wrong

asciilifeform: trick is : i don't believe in large programs.

asciilifeform: if it means simplicity+reliability

asciilifeform: and am quite happy to have entire build process repeat every single time the button is pushed

asciilifeform: i gotta admit : i don't consider the problem to be a very interesting one

asciilifeform: lately -- gprbuild

asciilifeform: traditional make

asciilifeform: http://btcbase.org/log/2017-06-03#1664879 << v is -- properly considered -- an abstract concept, quite divorceable from the abominations of gnudiff/patch and gpg ☝︎

asciilifeform: http://btcbase.org/log/2017-06-03#1664877 <<< >>> http://btcbase.org/log/2017-05-31#1663662 ☝︎☝︎

asciilifeform: !!up erlehmann

asciilifeform: !!up erlehmann

asciilifeform: not when i wrote !

asciilifeform: erlehmann: didja ask him what specifically it would mean to 'subvert' an fpga ahead of time (i.e. when you have no idea what will be loaded into it, and into what cells in particular ) ?

asciilifeform: latest twist was that some d00dz ~partially~ reversed lattice's toolchain. but their shit ~doesn't work, http://btcbase.org/log/2017-01-16#1604097 ☝︎

asciilifeform: erlehmann: start http://btcbase.org/log/2015-06-17#1165927 , or http://btcbase.org/log/2014-12-11#950467 , or http://btcbase.org/log/2016-10-03#1551513 ... ☝︎☝︎☝︎

asciilifeform: the history doesn't change.

asciilifeform: we've had this particular thread at least 7 times

asciilifeform: you really gotta read the logs, erlehmann

asciilifeform: problem is, THEY DON'T EXIST

asciilifeform: i'd still like to replace it with a civilized fpga for which you don't need a 20GB closed source shitware toolchain

asciilifeform: but on the other hand it is a very small cpld, and runs a pretty simple state machine, whose honest function is verifiable by the operator with reasonable effort

asciilifeform: erlehmann: i manufacture and sell a product ( http://nosuchlabs.com/hardware.html ) with a xilinx cpld in it

asciilifeform: !#s xilinx

asciilifeform: !#s fpga

asciilifeform: ( open source, and author sells the pcb, so you don't have to necessarily make the pcb by hand )

asciilifeform: had to desolder internals and put in new controller

asciilifeform: mno

asciilifeform: most of my time is spent thinking, not pressing keys as-fast-as-possible

asciilifeform: but no longer type enough to make keyboard fiddling worthwhile thing

asciilifeform: erlehmann: funnily enough -- today -- i can

asciilifeform: having to ever go back and forth -- is what nukes the whole 'custom keyboard' thing for many folx (incl. asciilifeform)

asciilifeform: so then you don't have your layout. ~unless~ you did it in hardware.

asciilifeform: ( sooner or later you will boot into something -- hell, even if only bios setup or rescue disk -- or an ancient lappy on kvm, etc -- that doesn't know about your magic layout )

asciilifeform: even if you don't winblowz, remapping keyboards only works well in hardware imho

asciilifeform: then screw heat sink back on.

asciilifeform: scrape that shit off, put in 'arctic silver' or whatever yer favourite 'toothpaste'

asciilifeform: holy fuq pete_dushenski , i suppose you've never taken a heat sink off before ?!

asciilifeform: pete_dushenski: http://www.contravex.com/2017/06/02/5770-flambe/#comment-57116

asciilifeform: then put wires in the breadboard, attached to scope

asciilifeform: mod6: another tip : when playing with fg & scope/logic analyzer, it is convenient to turn it upside-down and sink the 'teeth' into a breadboard

asciilifeform: it's what, 1kHz tho.

asciilifeform: see if you can get it to display the wave pictured in the manual.

asciilifeform: mod6: play with the test clip on the scope ( the thing immediately to the right of ch4 bnc jack ) first

asciilifeform: one or more of your grounds is loose.

asciilifeform: that looks horrid, mod6

asciilifeform: mod6: after you have the basics , everything else will make sense.

asciilifeform: ( it's 1 or 2 models after )

asciilifeform: ftr mod6 has much spiffier scope than asciilifeform

asciilifeform: if you set '10x' that turns on voltage divider

asciilifeform: it's why you'll find coax jacks on high-end fpga boards

asciilifeform: it is still very loudly mutilated by your cabling but this is not avoidable (without specially made cable)

asciilifeform: is the blue input ac-coupled by any chance ?

asciilifeform: that looks atrocious

asciilifeform: you can then use it as a manual sharp-needle-poke

asciilifeform: moar wisdom : the nose of the scope probe, comes off

asciilifeform: ( you do NOT want a long wire between ground clip and the circuit )

asciilifeform: ( it is tied to the ground plane )

asciilifeform: another tip : rng shield is an ok place for the gnd clip

asciilifeform: but very much a physical limitation of your measurement setup. see above.

asciilifeform: the effect in your picture is not the power supply's fault

asciilifeform: at 14.7456MHz , your cable is a substantial parasitic capacitor ( and inductor )

asciilifeform: if you want to see something closer to the actual signal

asciilifeform: get rid of the massive cable / multiple clip-to-cable joints

asciilifeform: yeah, that'd be it

asciilifeform: ( even a very clean clock, if frequency is >1MHz or so, will not look like 'ideal' square when viewed through clip probes on scope. you will see 'ringing' )

asciilifeform: mod6: post pic ?

asciilifeform: mod6: you wouln't leave 1 lead off voltmeter hanging in the air, wouldja? same idea.

asciilifeform: shield - to the gnd clip

asciilifeform: center connects to tip of probe

asciilifeform: mod6: you will notice that scope bnc connector has two conductors

asciilifeform: it exists ~between~ two objects

asciilifeform: a voltage is a potential ~difference~