asciilifeform fesses up that he worked on it, on and off, for some months, so as to have a 'killerapp' application for cardano when the latter is unwrapped

asciilifeform will then end up stuck with doing actual werk

asciilifeform: anyone learn the fate of nanotube yet ?

asciilifeform: punkman: but back to original question, mips is vastly easier to implement in programmable logic of whatever kind than x86. this ought to be obvious to anyone with even an evening's familiarity with both.

asciilifeform: mostly they hook up vendor 'library' parts together. these usually (though not always) correspond to miniature 'islands' of asic present on the chip

asciilifeform: and of the LUTs

asciilifeform: folks doing actual work with fpga make very light use of the general-purpose routing matrix

asciilifeform: this is because the entire fpga concept, as imagined by n00bs to the subject, does not actually work.

asciilifeform: punkman: one can attempt to work with just the synthesis toolchain (no escape from it) and use netlists of 'raw' logic - i.e. simple universal constructs like 'nand gate'. the result - go try it - a very simple kindergarten-level circuit fills up the entire chip, with glacial performance (gate delays measured in msec!)

asciilifeform: punkman: [fpga thread] would MIPS be easier than x86? or does the problem lie in connecting the thing to outside world (fast RAM, peripherals, etc) << problem is that you can't make so much as a barrel shifter on any extant fpga without using a closed turd from the vendor - actually, two turds: one in the logic library part itself, other - the synthesis toolchain

asciilifeform: ;;later tell mircea_popescu http://log.bitcoin-assets.com/?date=05-01-2015#966169 ☝︎