asciilifeform: BingoBoingo: let the fella eat at own pace, or will choke
asciilifeform: ( and likewise zero input-variant memory addressing )
asciilifeform: i.e. performs, e.g. rsa, with zero conditional-on-inputs branch instructions, anywhere.
asciilifeform: OriansJ: lotsa folx over the years landed in the logs, and thought 'these people sit and philosophize and what'. but plenty of examples of working mechanism , if yer interested to study. http://www.loper-os.org/?cat=49 for instance is a just-short-of-done constant-time 0-dependency cryptoarithmetizer.
asciilifeform: 'мажоритарная логика' (majority-logic) in the general case, i do not recall what the english folx call it ( afaik they gave up on it errywhere other than orbit in recent yrs )
asciilifeform: cribbed directly from classical sov-engineering, like just about all other asciilifeform methods.
asciilifeform: i do not claim to have invented the method.
asciilifeform: imho this is an absolute ~minimal~ requirement for hypothetical sane irons of any other type.
asciilifeform: ^ i.e. a unit suspected of containing hidden functionality vis-a-vis any other existing unit, can be 'slaved' to the latter , and the outputs compared.
asciilifeform: ( bits known -- that is -- to you only )
asciilifeform: ( and deterministically testable for 'doing what's printed on the box' . you pump a coupla TB of known bits through it, and observe that the expected outs in fact came out )
asciilifeform: OriansJ: if you're interested in concrete approach of asciilifeform to design of iron, i invite to study http://nosuchlabs.com/hardware.html , item asciilifeform designed & sold ( two runs sold out 100% , possibly in near future we bake a 3rd, on ice40 and photoscintillator , as discussed in logs )
asciilifeform: from pov of this thread, it is a practical example that sane (i.e. typechecking & boundschecking of ALL memory accesses) iron in fact existed, and even fit in 1980s vlsi (2um)
asciilifeform: OriansJ: you wouldn't want to build a new comp that replicates it entirely. for one thing, iirc could only address 256M , with no possib of expansion
asciilifeform: largely to experiment with the orig. os , it was an item quite far ahead of what today is taught as 'state of art'. but the iron also imho is good starting point for hypothetical sane iron.
asciilifeform: OriansJ: there's an emulator , though not a cycle-accurate one . asciilifeform is (slowly) gathering the seekrits needed for cycle-accurate reproduction of the orig.
asciilifeform: vendor killed itself via 'enron'-level mismanagement, imploded , so not much known about today outside of specific circles of sane-iron enthusiasts.
asciilifeform: this was an actual commercial item, not laboratory prototype.
asciilifeform: i have the orig. paper docs, they fill a bookcase, but they're actually all mirrored there.
asciilifeform: vendor supplied lisp, ada, fortran, even c, compilers , which interoperated to the point of safely calling proggy written in 1, from another
asciilifeform: OriansJ: 'open source' folx have a professional disease, where they succumb to temptation of redefining a difficult problem into a non-equivalent but easier one
asciilifeform: so patents in no case are the problem
asciilifeform: OriansJ: re patents, there's plenty of folx living in free world, who will piss on whatever patent simply for the pleasure of the piss
asciilifeform: beyond that, afaik state of the art is 'ha, very funny, you wanted what?!'
asciilifeform: the only semiconductor i've so far baked with own hands is cu oxide diode.
asciilifeform: and i do not see anything in the linked recipe to suggest a kitchenable process.
asciilifeform: right, the problem is specifically that it's happening somewhere other than my kitchen.☟︎
asciilifeform: OriansJ: the french already offer 8k (iirc) for 400nm . this is not the problem.
asciilifeform: i.e. there is nothing there to suggest that the author has discovered a peculiarly cheap method of fabbing ic
asciilifeform: looking at the 'process steps' docs in the linked page, it seems to be a straight wikipedization of ordinary schoolbook description of ic fab process☟︎
asciilifeform: 1um actually is entirely enough . what's it cost ?
asciilifeform: 1st , i cannot resist to ask, what is/was 'libresilicon' ?
asciilifeform: and specifically as illustration of the physical limits of thompsonism, in the abstract
asciilifeform: OriansJ: i am not proposing it as 'boostrap for pc', but as ~replacement~ for pc.
asciilifeform: correct. so, proposing to put 64-state statemachine on each pin and look for it? and what, slip the timings so dram loses bits ? this is in the 'smoke' category, logic analyzer will find the peculiar defect, and victim buys another fpga.
asciilifeform: OriansJ: if i'm baking e.g. dram refresher -- then quite easily (and very frustratingly, in actual practice did, it is why it is ~impossible to bake a decent dram controller from scratch using fpga that hasn't been 'solved' ice40-style )
asciilifeform: OriansJ: incidentally, a pattern matcher on i/o pin will affect propagation delay
asciilifeform: the irons that speak these 'common patterns' -- already sabotaged decade+ ago, no need even to concern with fpga..
asciilifeform: the puzzler concerns 'general purpose' sabotaged fpga, rather than case where you know what the victim intends to connect and what protocols etc☟︎
asciilifeform: this goes back to 'knowing something about intended use' , neh
asciilifeform: OriansJ: i specifically picked the part for this attribute. ( ice40 was not 'solved' yet at the time , but it has quite similar topology )
asciilifeform: observe that it is entirely trivial to permute given netlist so that 9000 manufactured boards will each have unique one, with same function
asciilifeform: leverage how ? if you have literally 0 info re what netlist will be loaded and what cells it will make use of, and to what end
asciilifeform: ( if this counts as a useful attack, why not answer instead 'coupla gram of thermite' ? )
asciilifeform: OriansJ: let's posit. what does this give you, if you do not know what is connected to the i/o pins ? beyond ability to short +v to - and smoke
asciilifeform: i'm not currently sure that there is in fact any overlap between these two problems
asciilifeform: OriansJ: possibly we are speaking at cross purposes. having eaten the log, i formed impression that OriansJ is interested in hypothetical sane iron, and not merely dethompsonization of x86 pc.
asciilifeform: and yes, 'branch delay slot' is retarded. as is the whole pipeline concept. ( why ? cuz http://www.loper-os.org/?p=300 . sane iron FIRST, and ~then~ can ~maybe~ think about speed. )
asciilifeform: http://btcbase.org/log/2019-04-06#1907042 << all of these archs were missing essential piece for sanity -- type tagging and bounds checking. ( i.e. if running ada or lisp 'costs extra' on your iron vs. c , your arch is broken ! )☝︎
asciilifeform: i.e. whole problem of 'bootstrap', imho, is misformulated . why to fixate on thompsonism and then bring up multi-decamegabyte kernel fulla liquishit, on which to run overflowandcrashlang (aka 'c') compiler with which to then build moar of same, etc
