asciilifeform: the whole idea of 'digital circuit' is somewhat promisetronic
asciilifeform: Framedragger: short version of the story goes like this. our analogue rng is an analogue device, and is not synched with anything! so it occasionally violates the hold time constraint of any digital circuit it happens to be plugged into
asciilifeform: Framedragger: correct, and the analogue rngs have to be sampled through a latch clocked by same clock
asciilifeform: note that only 1 of the items in the manifest (the first) is vpatch
asciilifeform: and it isn't just 'the vpatches are available'
asciilifeform: shinohai: that hieroglyph doesn't display here...
asciilifeform: the thing sits down, in the end, using 71 out of the 72 macrocells in xc9572xl.
asciilifeform: (all of the 'always' blocks execute simultaneously, if 'execute' is even the word)
asciilifeform: btw in case there are folx who are not familiar with logic layout, this is not a comp proggy in the usual sense, it compiles to gate netlist
asciilifeform: i turned the 'reset' pin into a fuck-cloaca
asciilifeform: mircea_popescu: so then. no such thing. it is ~impossible to machine anything useful out of code, if it were possible, it would be done by compiler and the ~language per se~ would include this intelligence.
asciilifeform: mircea_popescu: recall the solrodar thread ?
asciilifeform: ^ folx who want to read, can read 'unofficial' here
