;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; ;; This file is part of 'M', a MIPS system emulator. ;; ;; ;; ;; (C) 2019 Stanislav Datskovskiy ( www.loper-os.org ) ;; ;; http://wot.deedbot.org/17215D118B7239507FAFED98B98228A001ABFFC7.html ;; ;; ;; ;; You do not have, nor can you ever acquire the right to use, copy or ;; ;; distribute this software ; Should you use this software for any purpose, ;; ;; or copy and distribute it to anyone or in any manner, you are breaking ;; ;; the laws of whatever soi-disant jurisdiction, and you promise to ;; ;; continue doing so for the indefinite future. In any case, please ;; ;; always : read and understand any software ; verify any PGP signatures ;; ;; that you use - for any purpose. ;; ;; ;; ;; See also http://trilema.com/2015/a-new-software-licensing-paradigm . ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;----------------------------------------------------------------------------- ;; State ;----------------------------------------------------------------------------- section .bss SlaveIRQ resd 1 ; External Interrupt from Slaves ;----------------------------------------------------------------------------- section .text ;----------------------------------------------------------------------------- ; SetIRQ : Trigger External Interrupt ( Parameter: constant IRQ # ) ;----------------------------------------------------------------------------- %macro SetIRQ 1 ; param is the IRQ # bts CP0_Cause, (CP0Cau_IRQ_Bottom + %1) %endmacro ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------- ; ClrIRQ : Clear External Interrupt ( Parameter: constant IRQ # ) ;----------------------------------------------------------------------------- %macro ClrIRQ 1 ; param is the IRQ # btr CP0_Cause, (CP0Cau_IRQ_Bottom + %1) %endmacro ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------- ; Built-In Iron IRQs: ;----------------------------------------------------------------------------- %define TIMER_IRQ 7 ; MIPS Timer (trigger when CP0_Count==CP0_Compare) ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------- ; IRQ from Slave: ;; TODO: locking and wait/sleep ;----------------------------------------------------------------------------- %macro SetSlaveIRQ 1 bts dword [SlaveIRQ], (CP0Cau_IRQ_Bottom + %1) %endmacro ;----------------------------------------------------------------------------- ;----------------------------------------------------------------------------- ; Poll for any Slave IRQ: ;----------------------------------------------------------------------------- %macro GetSlaveIRQ 0 mov eax, [SlaveIRQ] ; Get the Slave IRQ shadow register test eax, eax ; Is it zero? jz %%skip ; If was zero, skip; mov dword [SlaveIRQ], 0 ; Else, 1) Zero shadow register or CP0_Cause, eax ; 2) OR it into CP0_Cause. %%skip: %endmacro ;-----------------------------------------------------------------------------