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+ 46635728670946901EDCA4062D650365295341CF87401AC4FBB7F78423FAF76B5C246A07EA8E5FC76FCD4B49FF669102F556F47F7C5A247670FD00FFEE665B80m/i_decode.asm(0 . 0)(1 . 284)
1163 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1164 ;; ;;
1165 ;; This file is part of 'M', a MIPS system emulator. ;;
1166 ;; ;;
1167 ;; (C) 2019 Stanislav Datskovskiy ( www.loper-os.org ) ;;
1168 ;; http://wot.deedbot.org/17215D118B7239507FAFED98B98228A001ABFFC7.html ;;
1169 ;; ;;
1170 ;; You do not have, nor can you ever acquire the right to use, copy or ;;
1171 ;; distribute this software ; Should you use this software for any purpose, ;;
1172 ;; or copy and distribute it to anyone or in any manner, you are breaking ;;
1173 ;; the laws of whatever soi-disant jurisdiction, and you promise to ;;
1174 ;; continue doing so for the indefinite future. In any case, please ;;
1175 ;; always : read and understand any software ; verify any PGP signatures ;;
1176 ;; that you use - for any purpose. ;;
1177 ;; ;;
1178 ;; See also http://trilema.com/2015/a-new-software-licensing-paradigm . ;;
1179 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1180
1181 ;-----------------------------------------------------------------------------
1182 ; Helper macros for MIPS instruction operands.
1183 ; All presume that current MIPS instruction is found in r_I.
1184 ; Note that variable shifts on x86 require slide amount to reside in CL.
1185 ;-----------------------------------------------------------------------------
1186
1187 ;-----------------------------------------------------------------------------
1188 ; These constants are fixed for the MIPS32 architecture and will NEVER change:
1189 ;-----------------------------------------------------------------------------
1190 ; Masks for Instruction Fields:
1191 %define rD_Mask 0xF800 ; Mask for rD Field
1192 %define rS_Mask 0x3E00000 ; Mask for rS Field
1193 %define rT_Mask 0x1F0000 ; Mask for rT Field
1194 %define Imm_Mask 0xFFFF ; Mask for Imm Field
1195 %define Shamt_Mask 0x7C0 ; Mask for Shamt Field
1196 %define J_Mask 0x3FFFFFF ; Mask for J Field
1197 %define Q_Mask 0x7 ; Mask for Q Field (MFC0/MTC0 instructions)
1198 ;-----------------------------------------------------------------------------
1199 ; Shifts for Instruction Fields (Imm doesn't need one) :
1200 %define rD_Shr 11 ; Right Shift for rD Field
1201 %define rS_Shr 21 ; Right Shift for rS Field
1202 %define rT_Shr 16 ; Right Shift for rT Field
1203 %define Shamt_Shr 6 ; Right Shift for Shamt Field
1204 %define J_Shl 2 ; Left Shift for J Field
1205 ;-----------------------------------------------------------------------------
1206
1207 ;-----------------------------------------------------------------------------
1208 ; Register Placements
1209 ;-----------------------------------------------------------------------------
1210
1211 ; To point to MIPS state:
1212 %define M_Base_64 rbp ; Pointer to base of MIPS data structure
1213 %define M_Base_32 ebp ; 32-bit component of above
1214
1215 ;-----------------------------------------------------------------------------
1216 ; Scratch Registers used inside Opcodes:
1217 ;-----------------------------------------------------------------------------
1218 %define rD eax ; Where to extract rD Field
1219 %define Imm rD ; Where IType's Imm goes (they have no rD)
1220 %define JTarg rD ; Where JType's J field goes
1221
1222 ; x86 is braindamaged and DEMANDS variable shift slides in CL. So rS is ECX.
1223 %define rS ecx ; Where to extract rS Field
1224 %define rS_LowByte cl ; Low byte of rS, for some 'flag' ops
1225 %define r_Shamt rS ; must be also this (see above)
1226 %define r_Q rS ; Q field in the coprocessor instructions
1227
1228 %define rT ebx ; Where to extract rT Field
1229
1230 ; Scratch Register for intermediates:
1231 %define TMP edx ; Scratch register used in all ops
1232 %define TMP_LowByte dl ; Low byte of TMP, for some 'flag' ops
1233
1234 ; After we decode all fields, we no longer need the original instruction :
1235 %define r_I TMP ; Copy of currently-executing instruction
1236 ;-----------------------------------------------------------------------------
1237
1238 ;-----------------------------------------------------------------------------
1239 ; Instruction Field Manipulations. Arranged so as to satisfy the x86 pipeline.
1240 ;-----------------------------------------------------------------------------
1241
1242 ;-----------------------------------------------------------------------------
1243 ; Extract rD, rS, rT fields from the currently-executing MIPS instruction
1244 ; For instructions encoded as ???? ??ss ssst tttt dddd d??? ???? ????
1245 ;-----------------------------------------------------------------------------
1246 %macro RType 0 ; no params
1247 mov rD, rD_Mask ; Mask for rD Field
1248 mov rS, rS_Mask ; Mask for rS Field
1249 mov rT, rT_Mask ; Mask for rT Field
1250 and rD, r_I ; Mask orig. inst. to get rD Field
1251 and rS, r_I ; Mask orig. inst. to get rS Field
1252 and rT, r_I ; Mask orig. inst. to get rT Field
1253 shr rD, rD_Shr ; rD is now rD Index
1254 shr rS, rS_Shr ; rS is now rS Index
1255 shr rT, rT_Shr ; rT is now rT Index
1256 %endmacro
1257 ;-----------------------------------------------------------------------------
1258
1259 ;-----------------------------------------------------------------------------
1260 ; Extract only rS field from the currently-executing MIPS instruction
1261 ; For instructions encoded as ???? ??ss sss? ???? ???? ???? ???? ????
1262 ;-----------------------------------------------------------------------------
1263 %macro RType_S_Only 0 ; no params
1264 mov rS, rS_Mask ; Mask for rS Field
1265 and rS, r_I ; Mask orig. inst. to get rS Field
1266 shr rS, rS_Shr ; rS is now rS Index
1267 %endmacro
1268 ;-----------------------------------------------------------------------------
1269
1270 ; Works same
1271 %define IType_S_Only RType_S_Only
1272
1273 ;-----------------------------------------------------------------------------
1274 ; Extract only rS and rT fields from the currently-executing MIPS instruction
1275 ; For instructions encoded as ???? ??ss ssst tttt ???? ???? ???? ????
1276 ;-----------------------------------------------------------------------------
1277 %macro RType_S_T_Only 0 ; no params
1278 mov rS, rS_Mask ; Mask for rS Field
1279 mov rT, rT_Mask ; Mask for rT Field
1280 and rS, r_I ; Mask orig. inst. to get rS Field
1281 and rT, r_I ; Mask orig. inst. to get rT Field
1282 shr rS, rS_Shr ; rS is now rS Index
1283 shr rT, rT_Shr ; rT is now rT Index
1284 %endmacro
1285 ;-----------------------------------------------------------------------------
1286
1287 ; Works same
1288 %define IType_S_T_Only RType_S_T_Only
1289
1290 ;-----------------------------------------------------------------------------
1291 ; Extract only rS and rD fields from the currently-executing MIPS instruction
1292 ; For instructions encoded as ???? ??ss sss? ???? dddd d??? ???? ????
1293 ;-----------------------------------------------------------------------------
1294 %macro RType_S_D_Only 0 ; no params
1295 mov rD, rD_Mask ; Mask for rD Field
1296 mov rS, rS_Mask ; Mask for rS Field
1297 and rD, r_I ; Mask orig. inst. to get rD Field
1298 and rS, r_I ; Mask orig. inst. to get rS Field
1299 shr rD, rD_Shr ; rD is now rD Index
1300 shr rS, rS_Shr ; rS is now rS Index
1301 %endmacro
1302 ;-----------------------------------------------------------------------------
1303
1304 ;-----------------------------------------------------------------------------
1305 ; Extract only rD field from the currently-executing MIPS instruction
1306 ; For instructions encoded as ???? ???? ???? ???? dddd d??? ???? ????
1307 ;-----------------------------------------------------------------------------
1308 %macro RType_D_Only 0 ; no params
1309 mov rD, rD_Mask ; Mask for rD Field
1310 and rD, r_I ; Mask orig. inst. to get rD Field
1311 shr rD, rD_Shr ; rD is now rD Index
1312 %endmacro
1313 ;-----------------------------------------------------------------------------
1314
1315 ;-----------------------------------------------------------------------------
1316 ; Extract rD, rT, Shamt fields from the currently-executing MIPS instruction
1317 ; For instructions encoded as ???? ???? ???t tttt dddd dhhh hh?? ????
1318 ;-----------------------------------------------------------------------------
1319 %macro RType_D_T_Shamt 0 ; no params
1320 mov rD, rD_Mask ; Mask for rD Field
1321 mov r_Shamt, Shamt_Mask ; Mask for Shamt Field
1322 mov rT, rT_Mask ; Mask for rT Field
1323 and rD, r_I ; Mask orig. inst. to get rD Field
1324 and r_Shamt, r_I ; Mask orig. inst. to get Shamt Field
1325 and rT, r_I ; Mask orig. inst. to get rT Field
1326 shr rD, rD_Shr ; rD is now rD Index
1327 shr r_Shamt, Shamt_Shr ; r_Shamt is now Shamt value
1328 shr rT, rT_Shr ; rT is now rT Index
1329 %endmacro
1330 ;-----------------------------------------------------------------------------
1331
1332 ;-----------------------------------------------------------------------------
1333 ; Extract rD, rT, Q fields from the currently-executing MIPS instruction
1334 ; For MFC/MTC instructions encoded as 0100 0000 ?00t tttt dddd d000 0000 0qqq
1335 ;-----------------------------------------------------------------------------
1336 %macro CPType 0 ; no params
1337 mov rD, rD_Mask ; Mask for rD Field
1338 mov r_Q, Q_Mask ; Mask for Q Field
1339 mov rT, rT_Mask ; Mask for rT Field
1340 and rD, r_I ; Mask orig. inst. to get rD Field
1341 and r_Q, r_I ; Mask orig. inst. to get Q Field
1342 and rT, r_I ; Mask orig. inst. to get rT Field
1343 shr rD, rD_Shr ; rD is now rD Index
1344 shr rT, rT_Shr ; rT is now rT Index
1345 %endmacro
1346 ;-----------------------------------------------------------------------------
1347
1348 ;-----------------------------------------------------------------------------
1349 ; Extract Imm, rS, rT fields from the currently-executing MIPS instruction
1350 ;-----------------------------------------------------------------------------
1351 %macro IType 0 ; no params
1352 mov Imm, Imm_Mask ; Mask for Imm Field; needs no shift
1353 mov rS, rS_Mask ; Mask for rS Field
1354 mov rT, rT_Mask ; Mask for rT Field
1355 and Imm, r_I ; Mask orig. inst. to get Imm Field
1356 and rS, r_I ; Mask orig. inst. to get rS Field
1357 and rT, r_I ; Mask orig. inst. to get rT Field
1358 shr rS, rS_Shr ; rS is now rS Index
1359 shr rT, rT_Shr ; rT is now rT Index
1360 %endmacro
1361 ;-----------------------------------------------------------------------------
1362
1363 ;-----------------------------------------------------------------------------
1364 ; Extract only Imm, rS fields from the currently-executing MIPS instruction
1365 ;-----------------------------------------------------------------------------
1366 %macro IType_I_S_Only 0 ; no params
1367 mov Imm, Imm_Mask ; Mask for Imm Field; needs no shift
1368 mov rS, rS_Mask ; Mask for rS Field
1369 and Imm, r_I ; Mask orig. inst. to get Imm Field
1370 and rS, r_I ; Mask orig. inst. to get rS Field
1371 shr rS, rS_Shr ; rS is now rS Index
1372 %endmacro
1373 ;-----------------------------------------------------------------------------
1374
1375 ;-----------------------------------------------------------------------------
1376 ; Extract only Imm field from the currently-executing MIPS instruction
1377 ;-----------------------------------------------------------------------------
1378 %macro IType_I_Only 0 ; no params
1379 mov Imm, Imm_Mask ; Mask for Imm Field; needs no shift
1380 and Imm, r_I ; Mask orig. inst. to get Imm Field
1381 %endmacro
1382 ;-----------------------------------------------------------------------------
1383
1384 ;-----------------------------------------------------------------------------
1385 ; Extract Imm, rT fields from the currently-executing MIPS instruction
1386 ;-----------------------------------------------------------------------------
1387 %macro IType_I_T_Only 0 ; no params
1388 mov Imm, Imm_Mask ; Mask for Imm Field; needs no shift
1389 mov rT, rT_Mask ; Mask for rT Field
1390 and Imm, r_I ; Mask orig. inst. to get Imm Field
1391 and rT, r_I ; Mask orig. inst. to get rT Field
1392 shr rT, rT_Shr ; rT is now rT Index
1393 %endmacro
1394 ;-----------------------------------------------------------------------------
1395
1396 ;-----------------------------------------------------------------------------
1397 ; Extract J field from the currently-executing MIPS instruction
1398 ; Encoding: ???? 11ii iiii iiii iiii iiii iiii iiii
1399 ;-----------------------------------------------------------------------------
1400 %macro JType 0 ; no params
1401 mov JTarg, J_Mask ; Mask for J Field; needs no shift
1402 and JTarg, r_I ; Mask orig. inst. to get J Field
1403 shl JTarg, J_Shl ; Shift the J Field to get Target Address
1404 %endmacro
1405 ;-----------------------------------------------------------------------------
1406
1407 ;-----------------------------------------------------------------------------
1408 ; Sign-Extend((16bit Address) * 4) (where 18th bit is considered 'sign')
1409 ;-----------------------------------------------------------------------------
1410 %macro SX18_4N 1 ; param is A, the address to extend
1411 shl %1, 16 ; upper 16 bits are now equal to A
1412 sar %1, 14 ; Shift back to A*4, extending sign bit.
1413 %endmacro
1414 ;-----------------------------------------------------------------------------
1415
1416 ;-----------------------------------------------------------------------------
1417 ; Sign-Extend(16bit Address) (where 16th bit is considered 'sign')
1418 ;-----------------------------------------------------------------------------
1419 %macro SX16 1 ; param is A, the address to extend
1420 shl %1, 16 ; upper 16 bits are now equal to A
1421 sar %1, 16 ; Shift back to A, extending sign bit.
1422 %endmacro
1423 ;-----------------------------------------------------------------------------
1424
1425 ;-----------------------------------------------------------------------------
1426 ; Denote privileged (permitted in Kernel-Mode strictly) instructions.
1427 ;-----------------------------------------------------------------------------
1428 %macro PRIVILEGED 0
1429 bt CP0_Status, CP0St_UM ; CF := CP0St_UM Flag
1430 jnc %%proceed ; If UM = 0: Kernel Mode, proceed.
1431 test CP0_Status, (1 << CP0St_EXL) | (1 << CP0St_ERL) ; EXL or ERL
1432 jnz %%proceed ; If EXL && ERL: Kernel Mode, proceed.
1433 ;; We are NOT in kernel mode, but trying to execute a privileged inst:
1434 SetEXC EXC_RI ; Set the 'Reserved Instr.' Exception.
1435 jmp _Handle_Exception ; Go straight to exception handler.
1436 %%proceed ; We're in Kernel Mode, so proceed with the privileged instruction.
1437 %endmacro
1438 ;-----------------------------------------------------------------------------
1439
1440 ;-----------------------------------------------------------------------------
1441 ; Store the significant 32 bits of locative
1442 ;-----------------------------------------------------------------------------
1443 %macro A32 1 ; %1: locative
1444 dd %1
1445 %endmacro
1446 ;-----------------------------------------------------------------------------